This standard specifies the logical functions, terminal arrangement and main electrical parameters of the 4000 series of semiconductor integrated CMOS circuits. The identification and quality assessment of the device shall comply with the provisions of the device detailed specification. GB/T 3435-1987 Semiconductor integrated CMOS circuit series and varieties 4000 series varieties GB/T3435-1987 Standard download decompression password: www.bzxz.net

National Standard of the People's Republic of China
Series and Varieties of CMOS Circuits for Semiconductor
Products of families 4000
UDC 621,38,048
GB 3435—87
Replaces GB3435--82
This standard specifies the logic functions, hole terminal arrangement and main electrical parameters of semiconductor integrated CMOS circuits of family 400 (hereinafter referred to as devices). The identification and quality assessment of devices shall comply with the provisions of the device detailed paper specifications. When producing (developing) or selecting devices, the provisions of this standard shall be met. Unless otherwise specified, the logic involved in this standard is positive logic. 1 Symbols and Codes
1.1 The meanings of the logic graphic symbols used in this standard are shown in Appendix A (Supplement), and the meanings of the text symbols used are shown in Appendix (Supplement).
1.2 The device types, series and variety codes listed in this standard are the first, second and third parts of the device model. 2 Variety
Device name
Gate circuit
Six inverters
Four 2-input NAND gate
Three 3-input UFG gate
Dual 4-input NAND gate
Six inverters (with Schmitt trigger)
Four 2-input NAND gate" (with Schmitt trigger) Four 2-input NOR gate
Three 3-input NOR gate
Dual 4-input NOR gate
Four 2-input AND gate
Two 3-input AND gate
Dual 4-input AND gate
Four 2-input OR gate!
Triple 3-input OR gate
Dual 4-input OR gate
Approved by the National Bureau of Standards on January 21, 1987
Type, series and variety code
CC 4069
CC4011
CC4012
CC10106
cc4093
CC4001
CC4025
CC4002
CC4081
CC4073
CC4082
CC4075
CC4072
Implemented on August 1, 1987
8 Input NAND/AND Gate
8-input NOR/OR Gate!
Device Name
GB 3435-87
4-way 2-2-2-2 input AND/NOR Gate (Extensible) Dual 2-2 input AND/NOR Gate
8-input Multi-function Gate《3S, Extensible〉
Dual Five-complement Pair and Inverter
Dual 3-input NOR Gate Inverter
Dual 4-input NAND Gate and 2 Input NOR/OR gate Six inverters/buffers (3S, with select terminal) Six buffers (3S)
Current converter
Six reverse buffers/level converters
Six buffers/level converters
Six TTL/CMOS-CMOS current converters
Four low-high level converters (3S)
Flip-flops and latches
Gate input, three slave-K flip-flops (with, K input terminals) Double L rising edge K flip-flops
Dual master rising edge D flip-flops| |tt||Large rising edge D trigger
Quad RS latch (3S)
Quad R-5 latch (3S, NAND)
Quad D latch
8-bit ground latch
8-bit bidirectional addressable latch
Monostable trigger
Dual retriggerable monostable trigger (with clear terminal) Dual retriggerable monostable trigger
Dual precision monostable trigger
Monostable/astable multivibrator
Arithmetic unit
4 Binary forward full adder
Three non-serial state device
Serial adder (negative remote control)
BCD adder
4-bit arithmetic selection unit/function generator (32 auxiliary functions) type, series variety code
CC4068
CC4079
CC4086
CC4085
CC4048| |tt||CC4007
CC4000
CC14501
CC4502
CC4603
CC4049|| tt||CC4050
CC14504
CC40109
CC4096
CC4027
CC4013|| tt||CC40174
CC4043
CC4044
CC4042
CC14099
CC14599| |tt||CC14528
CC4098
CC4538
CC4047
CC4032
CC14560| |tt||CC40181
Carry lookahead generator
BCD ratio multiplier
Device name
4-bit binary ratio multiplier
4-bit value comparator
12-bit odd-order checker
Four XOR gates
Four XNOR gates
BCD inverter
Shift register and register
Dual 4 Shift register (serial input, parallel input) Dual 64-bit static shift register
18-bit shift register
8-bit shift register
GB3435--87
9-bit shift register (asynchronous parallel input, synchronous serial input/output) 4-bit shift register (complement output, parallel access, JK input) 4-bit bidirectional shift register (parallel access) 4-bit bidirectional shift register (parallel access, "- K input) Quad D register (3S)
8-bit bus register
1×4 multi-port register array (3S)
First-in-first-out register (S)
Priority encoder
10-line-4-line priority encoder (BCD output)8-line-3-line priority encoder
Data selector
16 to 1 analog switch
Dual 8 to 1 analog switch
8 to 1 analog switch
Dual 4 to 1 analog switch
Dual 4 to 1 data selector
Triple 2 to 1 analog switch
8 to 1 data selector (3 S)
Dual 1 to 1 / 8 to 1 Data selector 4 2 to 1 data selector
4 bidirectional switches
Type, series variety code
CC40182
CC4527
CC4089
CC14585
CC14531
CC4070
CC4077
CC14561|| tt||Cc4015
CC4517
CC14006
CC4021
CC4035
CC4019 4
CC40195
CC4076
CC4034
CC40208
CC40105
C C4U147
CC4532
CC4067
CC4097
cc4051
CC4052||tt| |CC14539
CC4053
CC14512
CC14529
CC4019
CC4066| |tt||Device name
4-line-16-line decoder (latch input) GB3435--87
4-line-16-line decoder (latch input, inverted code output)4-line-10-line decoder (BCD input)
Dual 2-4-line decoder
Dual 2-line: 4-line decoder (inverted code output)4-line-seven-segment decoder/driver (BCD input)4-line: t:Segment lock decoder/driver (BCD input) 4-wire seven-segment hexadecimal latch/decoder/driver (BCD input) 4-wire seven-segment decoder (BCD input, drive liquid crystal display) 4-wire seven-segment decoder (HCD input, with latch input, drive liquid crystal display) Counter
Dual decimal step counter
Dual 4-bit step counter
Decimal synchronous + counter (with preset terminal, asynchronous clear) 4-bit synchronous counter (with preset terminal, asynchronous clear) Decimal synchronous counter (Synchronous Clear) 4-bit synchronous counter (synchronous clear) -N-base down counter (with preset terminal): -N-base hexadecimal down counter (with preset terminal) configurable 1N counter
"base synchronous up/down counter (with preset terminal) 4-bit single-base counter (with preset terminal) output up/down counter (with preset terminal, dual clock) 1-bit binary synchronous up/down counter (with preset terminal, dual clock) decimal counter/pulse distributor
octal counter: pulse distributor (decode output) 7 Binary serial counter
12-bit serial counter
14-bit serial counter
14-bit serial counter
4-bit binary/decimal adder/subtractor (with preset terminal)+decimal adder/detailed code/latch/actuator 2.1 Six inverters
2.1.1 Logic cabinet
CC4069
Type, series variety generation| |tt||CC4514
CC4515
CC4028
CC4555
CC4556
CC14547|| tt||CC4511
cC1495
CC4055
CC14543
CC451R
CC4520||t t||CCA0ED
CC40161
CC40162
CC40163
CC14522
CC14526
CC4018
CC4510
CC4516
CC40192
CC40193
CC4017
CC:4022
CC4024
CC1040
CC4020
CC4060
CC4029
CC40110
2.1.2 Logical expression
2.1.3 External lead arrangement
2.1.4 Main electrical parameters (typical values)
tpd= 30ns (10 V)
2.2 2-input NAND gate
2.2.1 Logic diagram
2.2.2 Logical expression
2.2.a Pin arrangement
GB 3435—87
National National National National
IpD - 0.QlμA (10V)
CC4011
Total points
National National National National
0000000
2.2.4 Main current parameters (typical values)
f pd = 60ns (10V)
IDD -=0.0lμA (10V)
CC4023
2. 8 3 Input and NAND gate
2.3.1 Logic diagram
ZA2B2CA3E3C
Logical expression
External lead arrangement
2.3.4 Main electrical parameters (typical values)
pd = 60 ns (10V)
2.4 Dual 4-input and NAND gate!
2.4.1 Logic diagram
2.4.2 Logic circuit
2.4.3 Lead arrangement
GB 8435--8T
国国国国国国
IDD= 0.01μA (10 V)bzxZ.net
CC4012
LAIBICID
2 A2 2 C 2 D
2Y2D2C2B2A
自国国国
2.4.4 Main electrical parameters (typical values)
tpd= 60 ns (10 V)
IpD= 0.01μA (10V)
CC40106
2.5 Six-inverter (with Schmitt trigger) 2.5.1 Logic diagram
Color
2.5.2 Logical expression
2.5.8 External lead arrangement
2.5.4 Main electrical parameters (typical values)
tpd=70ns(10V)
GB 8A35—B7
Still still ... 2.6.4 Main electrical parameters (typical values)
t pd = 90 ns (10 V)
000500
1ABIY2Y
IDD = 0.02μA (10V)
CC4001
2.7 2-input NOR gate
2.7.1 Logic diagram
Logic expression
2.7.3 External lead arrangement
2.7.4 Main electrical parameters (typical estimates)
t pd - 60ns (10V)
2.8 Three-input NOR gate
2.8.1 Logic diagram
2.8.2 Logic formula
2.8.3 External lead arrangement
GB3435—8T
National Day
Time display
ID=n.01μA(10V)
CC4025
2A2B2C
Y =A+B+C
3A3B3C
a's Shang Shang Shang e store
2.8.4 Card electrical parameters (typical values)
tpd - 60 ns (10V)
2.9 Dual 4-input NOR gate
2.8.1 Logic diagram
IuD=0.01μA (<10V)
CC4002
TAiB 1C ID
2A282C3D
2.9.2 Logical expression
Lead arrangement
2.9.4 Main electrical parameters (typical values)
tpd=60ns(10V)
GB 3435-87
Y =A+B-C+D
Shang Tao Yi Yi Yi A
IDD= 0.01μA (10V)
2.10 Quad 2-input gate
CC4081
2.10.1 Logic diagram
Point summary
2.10.2 Logical expression
*2.10.3 External lead arrangement
2.10.4 Main electrical parameters (typical values)
YA·B
Shang Yi Tao Yi Shang Shang Xian
ID=0.01 MA(10V)
tpd=60ns(10V)
2.11 Triple 3-input AND gate CC4073
2.11.1 Logic diagram (1/3).
2.11.2 Logic expression
2.11.3 External lead arrangement
2.11.4 Main power parameters (typical values)
1p=60ns (10V)
GB 3435-87
３￥１￥
口000日时0
2℃2Y
1B2BZA
IDD= 0,01μA (10V)
2.12 Dual 4-input AND gate
1CC4082
2.12.1 Logic diagram
IALBICD
Logic expression
2.12.3 External lead arrangement
2A2E2 C2D
Y=AB.CD
aeaoaed
OOOG5OG
Y1AIA1C
GB3435-87
2.12.4 Main electrical parameters (typical values)
IDD = 0,01μA (10V)
1 pd=60ms(10V)
2,18 Four 2-input OR gate
2.18.1 Logic diagram
2,1 m.2 Logical expression
2.18.1 External lead arrangement
CC4071
Zhongke total point
Shang Yi Shang Yi Shang Yi
D0b000
2.18.4 Main electrical parameters (typical values)
Ip=0.01μA(10V)
+pd = 60ns (10 V)
2.14 Triple 3-input OR gate
CC4075
2.14.1 Logic diagram (1/3)
Logical expression
Y=A+B+C
External lead arrangement
2.14.4 Main electrical parameters (typical values)
tμd=60us (10V)
2.15 Dual 4-input OR gate!
2.15.1 Logic diagram
2.15.2 Logical expression
2.15.3 External lead arrangement
GB3435—87
国国国国日司
00团0口
ID = 0.01μA (10V)
CC4072
1AIBIC1D
2A2B2C2D
Y=A+B+C+D
2.16.4 Electrical parameters (typical values)
tpd-60ns(10V)
2.168 Input NAND/AND gate
2.16.1 Logic diagram
Ipn=0.01μA(10V
CC4068
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