SJ 20161-1992 Semiconductor Integrated Circuit JT54LS273 (373, 374 and 377) Type LS-TTL Cascadable Trigger Detailed Specification SJ20161-1992 Standard Download Decompression Password: www.bzxz.net

Detail specification for types JT54LS273.JT54LS373.JT54LS374and JTS4LS377 cascadable FLIP-FLOPS of LS-TTLsemiconductor integrated circuits 1992-11-19 Issued on May 1, 1993 Implementation Issued by the Ministry of Machinery and Electronics Industry of the People’s Republic of China 1 Scope 1.1 Subject matter 2 Scope of application 1.3 Classification 2 Reference documents 3 Requirements 3.1 Detailed requirements 3.2 Design, structure and dimensions 3.3 Lead materials and coating 3.4 Electrical characteristics 3.5 Electrical test requirements 3.6 Exploration 3.7 Classification of microcircuit groups 4 Quality assurance provisions 4.1 Sampling and inspection |4.2 Screening·…
4.3 Qualification test
4.4 Quality conformity test
4.5 Test method
5 Delivery preparation
5.1 Packaging requirements.
6 Instruction card items
6.1 Intended use
6.2 Ordering information·wwW.bzxz.Net
6.3 Abbreviations, symbols and definitions·
6.4 Substitution…
People's Republic of China Electronic Industry Military Standard Semiconductor Integrated Circuits
JT54LS273JT54LS373, JT54LS374 and JT54LS377 LS-TTL Cascadable Trigger Detailed SpecificationDetail specification for types JC4014, JC4015 and JC4021shift rcgisters of CMos semiconductor integrated circuits1Scope
1.Subject content
SJ 20161---92
This specification specifies the detailed requirements for semiconductor integrated circuits JT54LS273, JT54LS373, JT54LS374 and JT54LS377 type LS-TTL section cascade triggers (hereinafter referred to as devices). 1.2Scope of application
This specification applies to the development, production and procurement of devices. 1.3Classification
The devices given in this specification are classified according to device model, device grade, packaging form, rated value and recommended normal price. 1.3.1 Device number
The device number shall comply with the provisions of GJB597 "General Specification for Microcircuits". 1.3.1.1 Device model
Device model
JT54LS273
JT54LS373
JT54LS374
JT54LS377
1.3.1.2 Device grade
Device name
Eight rising edge D flip-flops (Q output, with common clear terminal) Eight latches (enable input with loop characteristic) Eight rising edge D flip-flops (3S, clock input with loopback characteristic) Eight D flip-flops
The device grade shall be Class B as specified in Article 3.4 of GJB597 and Class B1 as specified in this specification. 1.3.1.3 Package form
Approved by the Ministry of Machinery and Electronics Industry of the People's Republic of China on November 19, 1992 and implemented on May 1, 1993
The package form is as follows:
1.3.2 Absolute maximum ratings
Power supply voltage
Input voltage
Storage temperature
Package form (GB7092'Semiconductor integrated circuit dimensions》) C20P3 (ceramic leadless chip carrier package) D20S2 (ceramic dual in-line package)||t t||F20X2 (ceramic flat package)
H20X2 (ceramic olefin sealed flat package)
J20S3 (ceramic fusion sealed dual in-line package)
JT54LS273
JT54LS373
JT54LS374
JT54LS377
Lead solder overflow resistance ([0s)
Junction temperature 23
Note: 1) The device should be able to withstand the increased power dissipation when the output short-circuit current (10s) is tested. 2) Except for the aging test in 4.3 of this specification, the junction temperature should not exceed 175℃. - 2
1.4 Recommended Operating Conditions
Power Supply Voltage Range
Input High Level Voltage
Input Low Level Voltage
Worker Ambient Temperature
JT54LS273
JT54LS374
JT54LS373
Setup Time
JT54LS377
JT54LS273
JT54LS374
Hold Time
Input Pulse
JT54LS377
JT54LS373
EN Valid
EN Invalid
FTS4LS273 (CP)
JT54LS377 (CP)
JT54LS273(CR)
JT54LS373 (EN)
FT54LS374(CP)
Referenced documents
Specification value
GB3431.1—82 Semiconductor integrated circuit text symbols Electrical parameter text symbols GB3431.2-86 Conductor integrated circuit text symbols Terminal function symbol Maximum
GB3439—82 Basic principles of semiconductor integrated circuit TTL circuit test methods GB4590—84 Mechanical and climatic test methods for semiconductor integrated circuits GB4728.12—85 Graphic symbols for electrical diagrams Binary logic unit Unit
GB7092 Dimensions of semiconductor integrated circuits GJB548-~88 Test methods and procedures for microelectronic devices GJB597—88 General specifications for microcircuits
GJB/Z10S Electronic Products Anti-static Discharge Control Manual 3 Requirements
3.1 Detailed group specifications
All requirements shall be in accordance with the provisions of GJB97 and this specification. 3.2 Design, structure and dimensions
The design, structure and dimensions shall comply with the provisions of GJB597 and this specification: Logic symbols, logic diagrams and lead-out arrangement 3.2.1
Logic symbols, logic diagrams and lead-out arrangement shall comply with the provisions of Figure 1. The lead-out arrangement is a top view. Function table
The function table shall comply with the provisions of Figure 2.
JT54LS373
JT54L5273
JT54LS377
JT54LS374
: H-~ high: L- low level: Z-high group, +-low to still use jump: X-any; Qo specifies the steady-state input conditions before the establishment of the current half of Q
Logic symbol
Logic diagram
Lead-out arrangement Column
D, F, H, J type
National ORR
Figure 1aJT54LS273
212019
16 hoursa
910111213
Logic symbol
Logic diagram
Introduction mountain end arrangement
DF, H, J type
JT54LS373
21 0 19
5 10 111#t3
Logic symbol
Logic diagram
Pin terminal arrangement
D, F, H, J type
JT54LS374
±1 20 19
9 10 t11213
Logic symbol
Logic diagram
Pin terminal arrangement
D, F, HJ type
Figure 1dJT54LS377
Figure 1 Logic symbol, logic diagram and pin terminal arrangement C type
910111213
3.2.3.2.4 Package form
The package form shall comply with the provisions of Article 1.3.1.3 of this specification GJB 597. 3.3 Lead materials and coating
Lead materials and coating shall comply with the provisions of Article 3.5.6 of GJB597. 3.4 Electrical characteristics
Electrical characteristics shall comply with the provisions of Table 1 of this specification. Table 1---1 JT54I.S273 characteristics
Output level voltage
Output low level current
Input voltage at maximum input voltage
Input high current
Input low level current
Transmission current 2)
Power supply current
Maximum time
Transmission delay time
Conditions!
(If otherwise specified, -55℃≤r≤125℃)Vcc-4.5 V, Vin=2.0 V, TH--4n0 μA Yc.-4.5 Y, Yu-0.7 V, la.-4 mA Fec=4.5 V, Jik=-18 mA, Ta=25 'CYee-5.5 V, V-7.0 V
Ycc=5.5 V, V-2.7 V
Vce=5.5 V, y,=0.4 v
Vee-5.5 V, V=-5.0 V
Vcc=5.0 V, G=15 pF, R,=2 k
Vcc=5.0 V, C =15 pF, R,=2 k Note: 1) The complete test conditions are listed in Table 3 2) Only one input terminal can be short-circuited at a time.
Normal value
Output high level voltage
Output low level voltage
Input voltage is also guaranteed
Maximum input voltage input
Input normal level current
Input low level current
Output short circuit current 22
Output impedance high level
Input high impedance low level
Power supply current
Transmission delay time
Table 1-2 JIT54I.S373 output characteristics
Condition 15
(No other provisions: -55℃≤T≤125℃) Vec=4.5 V, Vm=2.0 V, Yoi=-1 mAVcc=4.5 V, Vu=0.7 V, lo.=12 mAVu-4.5 V, i--IS mA.T-25 ℃
Yu-5.5 V,V,-7.0V
I Vec=5.5 V. V=2.7 V
Vcc=5.5 V, V=0.4 V
Vec=5.5 V
Vec-5.5 V, V=2.7 V
Yec=5.5 V, V=0.4 V
Vee-5.5 V, Y-5.0 V
Vcc=5.0 V, C,=45 pF,
R= 680
Vec=5.0 V, C,=5 pF.
R,=6000
Note: 1) The complete test conditions are shown in Table 3, 2) Only one output terminal can be short-circuited at a time.
Specification value
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