GB/T 11497.2-1989 Semiconductor integrated circuits CMOS circuit series and varieties 54/74HCT series varieties GB/T11497.2-1989 Standard download decompression password: www.bzxz.net

National Standard of the People's Republic of China
Series and varieties for CMoS semiconductur integrated circuitsProducts of series 54/74HCT
GB 11497.2—89
This standard specifies the logic functions, external lead arrangement and main electrical parameters of the varieties of semiconductor integrated circuits CMOS circuits 54/74HCT series (hereinafter referred to as devices). The quality assessment of devices shall comply with the provisions of the relevant detailed specifications of the devices. When producing (developing) or selecting devices, their series and varieties shall comply with the provisions of this standard. Unless otherwise specified, the logic involved in this standard is positive logic. 1 Symbols and codes
1.1 The logical graphic symbols used in this standard comply with the provisions of GB4728.12 Graphic symbols for electrical diagrams "Binary logic units". The symbols used in this standard comply with the provisions of GB3431.1 "Semiconductor Integrated Circuit Symbols, Electrical Parameter Symbols" and GB3431.2 "Semiconductor Integrated Circuit Symbols, Lead Function Symbols". 1.2 The device type and series variety codes listed in this standard are the 0th, 1st and 2nd parts of the device model specified in GB3430 "Semiconductor Integrated Circuit Model Naming Method".
2 varieties
gate circuit, inverter
six inverters
six inverters (fully open)
six inverters (with Schmitt fuse)
quadruple 2-input NAND gates
dual 4-input NAND gates
quadruple 2-input NAND gates (open drain)
quadruple 2-input NOR gates
quadruple 2-input AND gates
quadruple 2-input OR gates
2-way 3-3 input, 2-way 2-2 input AND-OR gate buffers, drivers
quadruple bus buffers (3S)
Ministry of Machinery and Electronics Industry of the People's Republic of China 19 89-03-18 Approved type, series and variety code
CC54HCT04/CC74HCT04
CG54HCT05/CC74HCT05
CC54HCT14/CXC74HCT14
CC54HCT00/CC74HCT00
CC54HCT20/CC74HCT20
CC54HCTO3/CC74HCT03
CXC54HCT02/CC74HCT02
CC54HCTO8/CC7 4HCTU8
CC541ICT32/CC74HT32
CC54HCT51/CC74HCT51
CC54HCT125/CC74HCT125
1990-04-01 implementation
Device name
Quad bus buffer (3S.EN high level valid)Quad bidirectional inverting bus transmitter/receiver (3S)Quad bidirectional bus transmitter/receiver (3S)Six bus drivers (9S, common control)
Eight inverting buffers/line drivers (35, two groups of control)Eight inverting buffers/ Line driver (3S)
Eight buffers/line drivers (3S, two-dimensional control)Eight buffers/line drivers (3S)
Eight buffers/line drivers (3S, two-group control)Eight bidirectional bus transmitters/receivers (3S)Eight bidirectional bus receivers/registers (3S)Eight bidirectional receivers/registers (3S)Eight bidirectional bus transmitters/receivers (3S, positive phase, negative phase)Flip-flops, latches
Double rising edge D flip-flops (with preset and clear terminals)Double rising edge D flip-flops (with preset and clear terminals)Quadruple rising edge D flip-flops (with common clear terminals)GB 11497. 2 --89
Type, series and variety code
CC54HCT126/CC74HCT126
CC54HCT242/CC74HCT242
CC54HCT243/CC74HCT243
CC54HCT365/CC74HCT365
CC54HCT240/CC74HCT240
CC54HCT540/CC74HCT510
CC54HCT241/CC74HCT241
CC54HCT541/CC74HCT541
CC54HCT244/C C74HCT244
CC54HCT245/CC74HCT245
CC54HCT640/CC74HCT640
CC54HCT646/CC74HCT646
CC54HCT648/CC74HCT648
CC54HT643/CC74HCT643
CC54HCT109/CC74HCT109
CC54HCT74/CC74HCT74
CC54HCT175/CC75HCT175
Six rising edge D flip-flops (Q output, with common clear terminal) Eight rising set D Flip-flop (35)
Eight rising edge D flip-flops (3S)
Eight rising edge D flip-flops (35, Bean output)Eight rising edge D flip-flops (35, Q output)Eight rising edge D flip-flops (with clear)
Eight D latches (3S)
Eight D latches (3S)
Eight D latches (3S, end output)
Eight D latches (3S, Q output)
Operational unit, digital comparator
Four 2-input XOR gates
&Bit-identical comparator (low level output valid)Register pass Bit register
8-bit shift register (serial input, parallel output) 8-bit bidirectional shift/storage register (3S)
CC54HCT174/CC74HCT174
CC54HCT374/CC74HCT374
CC54HCT574/CC74HCT574
CC54HCT564/CC74HCT56 4
CC54HCT534/CC74HCT534
CC54HCT273/CC74HCT273
CC54HCT373/CC7 4HCT373
CC54HCT573/CC74HCT573
CC51HCT63/CC74HCT63
CC54HCT533 /CC74HCT533
CC54HCTB6/CC74HCT86
CC54HCT688/CC74HCT688
CC54HCT164/CC74HCT164
CC54HCT299/CC74HCT299
Data Selector
8 to 1 Data Selector (with strobe input. Complementary output): 8 to 1 Data Selector (3S, Complementary output) Dual 1 to 1 Data Selector (with strobe input) Dual 4 to 1 Data Selector (3S)
Quad 2 to 1 Data Selector (with common strobe input) Quad 2 to 1 Data Selector (3S)
GB 11497.2-89
Type, Series CodewwW.bzxz.Net
CC54HCT151/CC74HCT151
CC541ICT251/CX74HCT251
CC54HCT153/CC74HCT153
CC54HCT253/CC74HCT253
CC54HCT157/CC74HCT157
CC54HL:T257/CC74HCT257
Four 2 to 1 Data Selector (with common strobe input terminal and inverted code output) Four 2 to 1 Data Selector (3S,Inverse code output) Decoder
3-line to 8-line decoder (data address latch) 3-line · · 8-line decoder
3-line · 8-line decoder
Dual 2-line to 4-line decoder
Counter
4-bit binary synchronous counter (asynchronous clear) 4-bit binary synchronous counter (synchronous division) Dual 4-bit ternary counter (asynchronous clear)
Decimal synchronous counter (abnormal Step clear)
CC54HCT04/CC74HCT04
2.1 Six inverters
Logic symbol
34-(5)
Logic expression
Main electrical parameters (typical values)
CC54HCT158/CC74HCT158
CC54HCT258/CC74HCT258| |tt||CC54HCT137/CC74HCT137
CC54HCT138/CC74HCT138
CC54HCT238/C76 HCT238
CC54HCT139/CC74HCT139
CC54HCT161/CG74HCT161
CC54HCT 163/CC74HCT163
CC54HCT393/CC74HCT393
CC54HCT160/CC74HCT160
Follow the structure diagram
Center
Lead out arrangement
tpd=—10ns
CL15pF)
(Vg5V)
GB 11497. 2—89
2.2 Six inverters (open drain) CC54HCT05/CC74HCT05 welcome symbol
34-662
4h9）
Logical expression
Main electrical parameters (typical values)
tpgns(V..=5VC.=15pF)
Ig2μA(V—5V)
Pin arrangement
uhiyce
2.3 Six inverters (with Schmitt trigger) CC54HCT14/CC74HCT14 logic symbol
SA(11)
（13)
Logic expression
Main electrical parameters (typical values)
Electrical schematic (1/6)
tu=12ns(Vx=5V,C=15pF)
I.≤2μA (V..-5V)
2.4 Schematic diagram of 4 2-input NAND gate CC54HCT00/CC74HCT00
Lead arrangement
147vea
2月（5）
Logical expression
YA·B
Symbol
Main electrical parameters (typical values)
taaI2ns(V.=5V.Ct=15pF)
f2uA(Ve-5V)
GB 11497. 2—89
Pin arrangement
2A port 4
CC54HCT20/CC74HCT20
2-5 Dual 4-input NAND gate
Avoidance symbol
Logical expression
YAB.CD
Main electrical parameters (typical values)
tra-10ns(V.=5V,Ct=15pF)
Iu2μA (V..-5V)
Pin arrangement
2.6 Quad 2-input NAND gate (open drain) (CC54HCT03/CC74HCT03 logic structure diagram
Edit structure diagram
28 (5)
Logic symbol
Pin arrangement
Edit expression
Main electrical parameters (typical values)
GB 11497.2-89
(V.=5V.C,=15pF)
tp=1ons
1.≤2μA (V.=5V)
2.7 Quad 2-input NOR gate CC54HCT02/CC74HCT02 logic symbol
(of)
3AL (8)
Compliance expression
Main electrical parameters (typical values)
tpa=10ns(V.—5V,Ct-15pF)
I2μA(Ve=5V)
Lead arrangement
Electrical schematic
Compliance structure diagram
GB 11497. 2-89
2.8 Quad 2-input AND gate CC54HCT08/CC74HCT08 compliance symbol
3-way—G30)
Logical expression
YA·B
Main electrical parameters (typical values)
(V.=5V,Cj. - 15pF)
tra=10ns
Im≤2μA (V-5V)
Lead out the circuit
2.9 Quad 2-input OR gate CC54HCT32/CC74HCT32 symbol
"48-(13)
Logical expression
Main electrical parameters (typical values)
(）sY
tpa-10n (V=5V.Ci=15pF)
I.≤2μA (V--5V)
Lead wax arrangement
2.102-way 3-3 input2-way 2-2 inputAND-OR gateCC54HCT51/CC74HCT51 structure diagram
Structure diagram
1E_(10)
tF_<1)
Logical expression
Edit symbol
TY-.iA.1B.IC+ID.IF.IF
2Y-2A·2B+2C.2D
Main electrical parameters (typical value)
tp-12ns(V5V,Ci-15pF)
I.$2μA(V..-5V)
GB 11497.2—89
Pin arrangement
2.11 Four bus buffers (3S) CC54HCT125C74H(T125 logic symbol
4A_(12)
Main electrical parameters (typical values)
(11)4Y
Logic structure diagram
ty-13ns(V=5VC.=45pF)
Im8μA(Ve=5V)
Pin arrangement
29 Bus buffer (3S, EV high level valid) CC54HCT126/CC74HCT1262.12
Logic structure diagram
Function clothes
TEN(1)
BEN 10
Compliance symbols
GB 11497.2—89
Compliance structure diagram
Main electrical parameters (typical values)
tpt13ns(V=5V.CL=45pF)
Ia8ua(V5V)
Pin arrangement
Function table
8Quad bidirectional inverting bus transmitter/receiver (3S) CCG4HCT242/CC74HCT2422.13
Compliance symbols:
-1,2 en
Pin arrangement
Main electrical parameters (typical values)
GB11497.2 89
(10)2B
Functional Configuration
Input Control
Data Transfer Status
Logical Structure Diagram
Note: * indicates that both directions are turned on at the same time, destructive oscillation may occur. tu=12ns(V5V.Cr=45pF)
GB 11497. 2 -89
2.14: Quad Bidirectional Bus Transmitter/Receiver (3S) CT54HCT243/CC74HCT243
Logical Symbol
-1,2EN3
Pin-out Arrangement
Functional Table
Input Control
Logical Structure Diagram
Data Transfer Status
Note: * indicates that both directions are turned on at the same time, destructive oscillation may occur. Main electrical parameters (typical values)
tu=12ns(V-5V,Ct=45pF)
I.≤8μA (V..-5V)
2.T5 bus driver (3S, public control) symbol
lead arrangement
GB 11497.2—89
CC54HCT365/CC74HCT365
（5）
<13】
Main electrical parameters (typical values)
t-13ns(V=5V,Ci=45pF)
Iw8μA(V.=5V)
Function table
Operation structure diagram
2.16 Eight inverting buffer/line driver (3S. two groups of control) CC54HCT240/CC74HCT240
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