This standard specifies signal quality requirements for serial data transmission at the interface between data terminal equipment (DTE) and data circuit-terminating equipment (DCE) for synchronous transmission. The signal quality requirements specified in this standard are limited to synchronous transmission at the interface with synchronous DCE. Signal quality related to asynchronous DTE is not part of this standard. This standard recognizes that the performance of signal quality needs to be classified according to the type of signal code timing interchange circuit used at the interface. Two types of timing should be considered, namely co-directional timing and reverse timing. GB/T 15276-1994 Information processing system Signal quality for synchronous transmission at the DTE/DCE interface for information exchange between systems GB/T15276-1994 Standard download decompression password: www.bzxz.net

National Standard of the People's Republic of China
Information processing systemsInformation exchange between systemsnsSynchronous transmissionsignal quality at DTE/DCE interfacesGB/T 15276--94
ISO 9543-1989
This standard is equivalent to the international standard ISO9543-1989 Information processing systems Information exchange between systemsnsSynchronous transmissionsignal quality at DTE/DCE interfaces".
1 Subject content and scope of application
1.1 This standard specifies the signal quality requirements for serial data transmission at the interface between data terminal equipment (DTE) and data circuit-terminating equipment (IXCE) for synchronous transmission. The interfaces covered by this standard conform to GB3454[V.24 (telephone network).G and GB11594[X.24 (data network)J, as in the following national standards or CCITT recommendations on DCE: GB7621 (V.22), V.22bis, GB7622 (V.23), GB 7624 (V. 26), GB 7625 (V. 26bis), GB 9541 (V. 26ter), GB 7626 (V.27), V. 27bis, V. 27ter, V. 29, V.32, V.33; or GB11599 (X.21bis) used with GB3455 (V.28) electrical characteristics; or GB9412 used with G33455 (V.28)/GB9412 (V.35) electrical characteristics; or V.36, GB9540 (V.37) or GIB11593 (X.21) used with GB7618 (V.10)/GH7619 (V.11) electrical characteristics; or X.22 used with GB7619 (V.11) electrical characteristics.
It is also considered that in the development of ISDN, there will be V-series and X-series interfaces as specified in V.110, X.30 and X.31 on the ISIDN reference point R.
Rate limits are determined by the applicable national standards or CCITTX series (e.g. X.10) and V series (e.g. V.5.V.6) recommendations for DCE.
The signal quality requirements specified in this standard are limited to synchronous transmission at interfaces with synchronous DCE. Signal quality related to asynchronous DTE is not part of this standard.
1.2 This standard proposes that the performance of signal quality needs to be classified according to the type of circuit used for signal code element timing interchange at the interface. Two types of timing are considered, namely co-directional timing and reverse timing. The classification of signal quality is based on the measurement of timing offset, jitter, duty cycle and timing signal accuracy between data signals and timing signals. However, there is an exception for ISDN reference point S/T applications. 1.3 This standard is particularly important when the interconnected equipment is provided by different organizations. This standard does not intend to indicate the measures to be taken when the limit conditions are not met, but it attempts to provide a basis for negotiation between the parties involved. 1.4 This standard does not describe the signal quality of the DCE or the lines associated with it, nor does it describe any requirements for acceptable bit error rates. 1.5 This standard may also be used for direct DTE to DTE connections when referenced using the interfaces of the following referenced standards. 2 Referenced standards
GB5271.9 (ISO2382-9) Data processing vocabulary 09 part data communication CCITT recommendation V.5 Standardization of data signal rates for synchronous data transmission in ordinary telephone switching networks Approved by the State Administration of Technical Supervision on December 7, 1994 and implemented on August 1, 1995
GB/T 15276—94
CCITT Recommendation V.6 Standardization of data signal rates for synchronous data transmission on leased telephone-type circuits GB7618 (CCITI Recommendation V.10) or X.26 Electrical characteristics of unbalanced two-stream interface circuits commonly used with integrated circuit devices in the field of data communications
GB7619 (CCITT Recommendation V.11) or X.27 Electrical characteristics of balanced two-stream interface circuits commonly used with integrated circuit devices in the field of data communications
GB7621 (CCITT Recommendation V.22) Standardized 1200 bit/s duplex modem for use on the automatic switching telephone network and point-to-point two-line leased telephone type circuits
CCITT Recommendation V.22bis Standardized 2100 bit/s duplex modem using frequency division technology on the ordinary switching telephone network and point-to-point two-line leased telephone type circuits
GB7622 (CCITT Recommendation V.23) Standardized 600/1200 baud modem for use on the automatic switching telephone network GB3454 (CCITT Recommendation V.24) Data Definition table of interface circuits between data terminal equipment (DTE) and data circuit terminating equipment (IXCE)
Standardized 2400 bit/s modem used on four-wire leased telephone type circuits GB7624 (CCITT Recommendation V.26)
Standardized 2400/1200 bit/s modem used on automatic telephone switching network GB7625 (CCITT Recommendation V.26bis)
GB9541 (CCITT Recommendation V.26ter) used on ordinary telephone switching network and point-to-point two-wire leased 2400 bit/s duplex modem using standardized echo cancellation technology on telephone type circuits GB7626 (CCITI Recommendation V.27) Standardized 4800 bit/s modem with manual equalizer for use on leased telephone type circuits
CCITT Recommendation V.27bis Standardized 4800/2400 bit/sec modem with automatic equalizer for use on leased telephone type circuits
Standardized 4800/2400 bit/sec modem for use on ordinary switched telephone networks.CCITT Recommendation V.27bis 27tcI
GB3455 (CCITT Recommendation V.28) Electrical characteristics of unbalanced two-stream interface circuitsCCITT Recommendation V.29 Standardized 9600 bit/s modem for use on point-to-point four-wire leased telephone type circuitsCCITT Recommendation V.32 Two-wire duplex modem for use on ordinary telephone exchange networks and leased telephone type circuits.E: Use of data signal rates up to 9600 bit/s
CCITT Recommendation V.33 Standardized -11400 bit/s modem for use on point-to-point four-wire leased telephone type circuitsGB9412 (CCITT Recommendation V.35) for 60~108kH zModem for 48kbit/s data transmission on primary circuitsCCITT Recommendation V.36Modem for synchronous data transmission on 60~108kHz primary circuitsGB9540 (CCITT Recommendation V.37)Synchronous data transmissionData signal rate is higher than 72kbit/sBroadband modem using 60~108kHz primary circuits
CCITT Recommendation V.110Integrated Services Digital Network (ISDN) support for data terminal equipment (DTE) with V series type interface
Data terminal equipment (DTE) supports the public data provided by PDV and/or ISDN through terminal adapterCCIIT Recommendation X.10
Categories of data transmission service access
GB11593 (CCITT Recommendation X.21) Interface between synchronous data terminal equipment (LTE) and data circuit-terminating equipment (DCE) on public data networks
GB11599 (CCITT Recommendation X.21bis) Usage of data terminal equipment (DTE) with synchronous V-series modem interface on public data networks
CCITT Recommendation X.22 Multiplexed DTE/IXCE interface for user category 3.6 GB11594 (CCITT Recommendation X.24) Interchange circuit definition table between data terminal equipment (DTE) and data circuit-terminating equipment (DCE) on public data networks
CCITT Recommendation X. 30
ISDN support for data terminal equipment (DTE) using GB11593 and GB11599
GB/T15276-94
CCITT Recommendation X.31 ISDN Support for Packet Mode Terminal Equipment 3 Definitions
This standard adopts the definitions given in GB5271.9 and the following definitions: 3.1 Co-directional Timing
A combination of a timing signal and a related binary signal (data or control) transmitted in the same direction through the interface (see Figure 7). 3.2 Reverse Timing
A combination of a timing signal and a related binary signal (data or control) transmitted in opposite directions through the interface (see Figure 8). 3.3 Signal Code Element Timing
A signal used to determine the duration of a signal code and achieve synchronization in a synchronous transmission system. 3.4 Timing Offset
The time between the effective transition of the signal code element timing and the related data bit transition relative to the unit interval. The degree of offset is usually expressed as a percentage.
3.5 Duty Cycle
In signal code element timing, the duration of the signal state after an effective transition occurs. The duration is usually expressed as a percentage of the unit interval. 3.6 Signal symbol
Each part of a telegraph or data signal. They are distinguished from each other by their nature, amplitude, duration and relative position (or by just one or more of these characteristics).
3.7 Effective instants
The instants at which successive effective states are identified by the corresponding conversion device or restoration device. Each time a valid state is captured by the corresponding device for recording or processing, an instant is determined. 3.8 Effective time
The time interval between two consecutive effective instants. 3.9 Jitter
The degree to which the effective instant of a digital signal temporarily deviates from its ideal position in time. 3.10 Interval
The change from one effective state to another in a telegraph or data signal. 3.11 Data signal rate
The total number of binary digits (bits) per second on the transmission path of a data transmission system (see the definition of GB5271.9 09.06.01 Note).
3.12 Serial transmission
The sequential transmission of a group of signal symbols representing a character or other data entity (see definition 09.03.04 of GB5271.9). 3.13 Synchronous transmission
A type of data transmission in which the occurrence time of each signal representing a bit is related to a fixed time base (see definition 09.03.12 of GB5271.9)
3.14 Synchronous DCE
A DCE is considered to be synchronous if the timing of signal symbols is exchanged at the interface with both the transmitting DTF and the receiving DTE. 4 Data signal rate characteristics
The nominal value of the data signal rate depends on the application and is therefore not part of this standard. 5 Signal quality of the transmitting DTE
GB/T 15276-94
The interchange circuits associated with the transmitting direction of the synchronous DTE shall operate within the specified system quality category as shown in Table 1. The letter symbols in the following clauses refer to the values ​​specified in Table 1. To simplify the presentation, the signal quality requirements for the transmission direction and the signal quality requirements for the reception direction are listed separately. It should be noted that circuit S can be used for both cases, and the relevant signal quality assignments are equal. Figure 9 illustrates the signal quality parameters on the interchange circuit related to the transmission direction. 5.1 Jitter on circuit 114 or circuit S
Figure 9 specifies the effective transitions of the timing of the number symbols on the interchange circuit 114 of GB3454 or the interchange circuit S of GB11594. During the observation period of 10, when tested at the actual data signal rate, their jitter should not exceed A% of the unit interval. The measurement should be carried out after the test arrangement is stable.
Note, 1) The provisions for effective transitions on circuit S are different for the reverse and same direction cases. 5.2 Jitter on circuit 113 or circuit ×
Figure 9 specifies the effective transitions of the timing of the signal symbols on the interchange circuit X of GB11594 or the interchange circuit 113 of GB3454. During an observation period of 10 &, when tested at the actual data signal rate, their jitter should not exceed B% of the unit interval. The measurement should be carried out after the test arrangement has stabilized.
5.3 Duty cycle of signal symbol timing
The duty cycle of signal symbol timing on the interchange circuits X, S, 113, 114 should be C% of the unit interval. 5.4 Accuracy of signal symbol timing
The data signal rate on the interchange circuits X, S, 113, 114 should not deviate from its nominal value by more than D%. 5.5 Timing offset between circuits with a co-directional timing relationship The offset between the associated transitions on the interchange circuit should not be less than E%, see Appendix A (reference). 5.6 Timing offset between circuits with a reverse timing relationship The offset between the associated transitions on the interchange circuit should not be greater than F%, see Appendix A (reference). 6 Signal quality of receiving DTE
The interchange circuit associated with the receiving direction of the synchronous DTE should operate within the specified system quality category, as shown in Table 1. The letter symbols in the following clauses refer to the values ​​specified in Table 1. Figure 10 illustrates the various signal quality parameters on the interchange circuit related to the receiving direction. 6.1 Jitter on circuit 128
Figure 10 specifies the effective transitions of signal symbol timing on the interchange circuit 128 of GB3454. During an observation period of 10 s, when tested at the actual data signal rate, their jitter should not exceed G% of the unit interval. The measurement should be carried out after the test arrangement is stable. 6.2 Jitter on circuit 115 or circuit S
Figure 10 specifies the effective transitions of signal symbol timing on the interchange circuit 115 of GB3454 or the interchange circuit SE of GB11594. During an observation period of 10 s, when tested at the actual data signal rate, their jitter should not exceed H% of the unit interval. The measurement should be carried out after the test arrangement is stable.
Note: 1) The provisions for effective transitions on circuit S are different for the reverse and co-directional cases. 6.3 Duty cycle of signal symbol timing
The duty cycle of signal symbol timing on the interchange circuit S.115, 128 should be 1% of the unit interval. 6.4 Accuracy of signal symbol timing
The deviation of the data signal rate on the interchange circuit S, 115.128 from its nominal value should not exceed J%. 6.5 Timing offset between circuits with reverse timing relationship The offset between the related changes on the interchange circuit should not be greater than K%, see Appendix A (reference). GB/T 15276--94
6.6 Timing offset between circuits with the same timing relationship The offset between the related changes on the interchange circuit should not be less than L%, see Appendix A (reference). 7 Measurements at the interchange point
The measurement of signal quality shall meet one of three sets of requirements, depending on whether their electrical interface characteristics conform to GB3455 or GB 7618 (or X.26) or GB7619 (or X.27). For measurements of GB9412 data and timing circuits, the GB7619 electrical interface characteristics may be considered as equivalent. 7.1 Measurement of GB 3455 generator characteristics 7.1.1 Use of standard test load
The measurement of signal quality shall be carried out on the generator side of a specific interchange circuit, which shall be terminated with a standard test load. The standard test load may be the input impedance of the equipment or an external device, but in all cases the total load on the interchange circuit shall meet the requirements of 7.1.2.
7.1.2 Specification of standard test load
The standard test load shall consist of a 3000 Ω resistor and a 2500 pF capacitor in parallel and shall be connected between the signal interchange circuit under test and GB3454 circuit 102 or GB11594 circuit Ga or circuit Gb. The test arrangement is shown in Figure 1. Tested interconnection cell
Equivalent voltage of standard load (including test equipment)
Tested generator
7.1.3 Signal quality of transmitting DTE
2600 pF
Circuit 102 (Ga.Gb)
Figure 1 Test arrangement of GB3455 generator
Signal quality measurements shall be made using thresholds of +3.0 V and -3.0 V to determine the occurrence of signal interconversion. The transition from binary 1 to binary 0 (off to on) shall be considered to occur at the instant when V1c crosses +3.0 V. The transition from binary 0 to binary 1 (on to off) shall be considered to occur at the instant when V1c crosses -3.0 V. 7.2 Measurements on the negative side of GB3455
7.2.1 Test arrangement
The measurement of signal quality on the load side of the interface shall use the test arrangement shown in Figure 2. 7.2.2 Signal quality of the receiving DTE
When the load under test is connected, the signal quality measurement shall be made using a V signal of ±5.0 V. The deviation in time of the transition shall be considered to occur at the instant when the signal crosses ±3.0 V.0V threshold value. Test signal generator
7.3 Measurement of GB7618 generator characteristics
GB/T15276--94
Tested interchange circuit
Circuit 102 (or Ga, Gb
Figure 2Test arrangement of GB3455 load
Negative load
7.3.1 Use of standard test load
Signal quality measurements should be made on the generator side of a specific interchange circuit, which should be terminated with a standard test load. The standard test load can be the input impedance of the equipment or an external device, but in all cases, the total load on the interchange circuit should meet the requirements of 7.3.2 .
7.3.2 Specification of standard test load
The standard test load shall consist of a 4500 Ω resistor and capacitor C in parallel and connected between the signal exchange circuit under test and the signal common return line. The test arrangement is shown in Figure 3. The value of depends on the data signal rate and shall be as listed in the table in Figure 3, except that the value of the capacitor included in the generator for waveform shaping shall be subtracted from the value of the capacitor. Tested Interchange Circuit
Tested Generator
Signal Common Return
Equivalent Circuit of Standard Data Collection (including test equipment)
Data Signal Rate
kbit/s
5. 0 10. 0
10. 0-25. 0
25. 0~ 50. 0
Figure 3 Test arrangement and Cw value of GB7618 generator 7.3.3 Signal quality of sending DTE
GB/T 15276—94
The measurement should be carried out using a threshold value within the range of ±0.3V to determine the occurrence of a signal transition. The threshold value is preferably a nominal value of 0V. 7.4 Measurement of GB7618 load quality
7.4.1 Test arrangement
The measurement of the signal quality on the load side of the interface should use the test arrangement shown in Figure 4. Interchange circuit under test
Test signal generator
7.4.2 Signal quality of receiving DTE
Baihao Public Tongwei
Figure 4 Test arrangement of GB7618 load
Tested negative oxygen
When the load under test is connected, the measurement should be carried out using a ±4.0V ViL signal. Transition The deviation in time shall be considered to occur at the moment when the signal crosses the threshold value (see 7.3.3). 7.5 Measurement of GB7619 generator characteristics
7.5.1 Use of standard test load
The measurement of signal quality shall be made on the generator side of a specific interchange circuit, to which a standard test load shall be connected. The standard test load may be the input impedance of the equipment or an external device, but in all cases the total load on the interchange circuit shall meet the requirements of 7.5.2.
7.5.2 Specification of standard test load
The standard test load shall consist of a 100 Ω resistor and shall be connected between output points A and B of the generator under test. The test arrangement is shown in Figure 5.
1 Equivalent voltage of the standard load (including the test equipment)
Test equipment
7.5.3 Quality of the signal to the transmitting DTE
Figure 5 Test arrangement of the GB7619 generator
GB/T 1527694
This measurement shall be made using a threshold value in the range of ±0.3V to determine the occurrence of signal skin change. The threshold value is preferably selected as the nominal value of 0V. 7.6 Measurement of the negative side of GB7619
7.6.1 Test arrangement
The measurement of the signal quality of the interface load shall use the test arrangement shown in Figure 6. Test signal generator
7.6.2 Quality of the signal to the receiving DTE
Figure 6 Test arrangement of the GB7619 load
When the load to be tested is connected, the measurement shall be made using a V signal of ±4.0V. The deviation in time of the transition of the signal shall be considered to occur at the moment when the signal crosses the threshold value (see 7.5.3). 7.7 Accuracy of measuring equipment This standard does not specify the tolerance of the negative value of the standard test, nor the accuracy of the measuring equipment or test signal generator. DTE Data signal (or control measurement) Timing signal Figure 7 Same direction timing
DTE pull
According to the sugar signal (or control)
Timing signal
Figure 8 Reverse timing
DCE or
Timing circuit 114
The signal on S
Data and control example
The signal on the circuit
Timing computer 113
Or the signal on ×
Data and control
Circuit 1, the borrowing sign
GB/F15276—94
Reverse timing
Same time timing
Figure 9 Schematic diagram of signal quality parameters on the interchange circuit related to the sending direction New
Timing circuit 12th||tt| |Signal on
Data and control
Signal on circuit
Timing circuit 115 or s
Signal on
Data and control
Signal on circuit
GB/T15276-94
Reverse timing
Network timing
Figure 10 Schematic diagram of signal quality parameters on the interchange circuit related to the receiving direction Table 1 Signal quality characteristics 1
Duty cycle of signal code element timing
Accuracy of signal code element timing
Timing offset (same time)
Timing offset (reverse direction)
t0.013),4
50±10
0. 0 31-1
GB/T1527694
Continued Table 1
Duty cycle of signal symbol timing
Accuracy of signal symbol timing
Timing offset (reverse direction)
Timing offset (co-direction)
50±10
50±10
Note: 1) When using this table to classify DTE signal quality, the data signal rate, operating mode and environmental conditions can be shown to ensure integrity 2) The value of 30% takes into account the fact that the signal symbol timing can be obtained from a timing source provided by the network, such as circuit S 3) Where the DTE provides a synchronous network clock, the signal symbol timing accuracy may be a value different from ±0.01%, particularly for data transmission of primary modems. When the data signal rate is 48 kbit/s and 64 kbit/s, the required accuracy is ±0.002% and ±0.005% respectively. 4) When DTE provides timing and is directly connected to another DTE, the timing accuracy of signal code elements can be relaxed GB/T 15276-94
Appendix A
Directional classification of timing relations
(reference)
Taking the circuits recommended by GR3454 and GB11594 as examples, Table A1 gives the classification of timing relations in the same direction and reverse direction for different circuits. These circuits are shown in Figure A1.
Table A1 Direction of timing relationship
Timing circuit
Data and control circuit
GB 3454
GB11594
Additional instructions,
GB 3454
GB3454
GB11594
According to the timing of receiving and sending
Sending DTE clock
Figure A1 Direction of timing and data interchange circuit This standard was proposed by the Ministry of Machinery and Electronics Industry of the People's Republic of China. This standard was drafted by the 30th Institute of the Ministry of Machinery and Electronics Industry. The main drafters of this standard are Wang Enrong and Zhang Jihong. x
GB 115942 Specifications of standard test load
The standard test load shall consist of a 4500 Ω resistor and capacitor C in parallel, and shall be connected between the signal interchange circuit under test and the signal common return line. The test arrangement is shown in Figure 3. The value of depends on the data signal rate and shall be as listed in the table of Figure 3. However, the value of this capacitor shall be reduced by the capacitor value included in the generator for waveform shaping. Tested interconnection circuit
Tested generator
Equivalent circuit of standard data transmission (including test equipment)
Data signal rate
kbit/s
5. 0 10. 0
10. 0-25. 0
25. 0~ 50. 0
Figure 3 Test arrangement and Cw value of GB7618 generator 7.3.3 Signal quality of transmitting DTE
GB/T 15276—94
The measurement should be carried out using a threshold value within the range of ±0.3V to determine the occurrence of signal transition. The threshold value is preferably selected as the nominal value 0V. 7.4 Measurement of GB7618 Load Characteristics
7.4.1 Test Arrangement
Measurement of signal quality on the load side of the interface shall be made using the test arrangement shown in Figure 4. Interchange Circuit Under Test
Test Signal Generator
7.4.2 Signal Quality of the Receiving DTE
Baihao Public Tongwei
Figure 4 Test Arrangement of GB7618 Load
Test Negative Oxygen
When the load under test is connected, the measurement shall be made using a ±4.0V ViL signal. The time deviation of the transition shall be considered to occur at the moment when the signal crosses the threshold value (see 7.3.3). 7.5 Measurement of GB7619 Generator Characteristics
7.5.1 Use of Standard Test Load
Measurement of signal quality shall be made on the generator side of a specific interchange circuit, which shall be connected using a standard test load. The standard test load may be the input impedance of the equipment or an external device, but in all cases the total load on the interchange circuit shall meet the requirements of 7.5.2.
7.5.2 Specification of the standard test load
The standard test load shall consist of a 100 Ω resistor and shall be connected between the output points A and B of the generator under test. The test arrangement is shown in Figure 5.
1 Equivalent impedance of the standard load (including the test equipment)
Test equipment
7.5.3 Quality of the signal transmitted by the DTE
Figure 5 Test arrangement for the GB7619 generator
GB/T 1527694
This measurement shall be made using a threshold value in the range of ±0.3V to determine the occurrence of signal skin change. The threshold value is preferably selected as the nominal value of 0V. 7.6 Measurements on the negative side of GB7619
7.6.1 Test arrangement
The quality of the signal on the interface load shall be measured using the test arrangement shown in Figure 6. Test signal generator
7.6.2 Quality of the signal on the receiving DTE
Figure 6 Test arrangement on the negative side of GB7619
When the load under test is connected, the measurement shall be made using a V signal of ±4.0 V. The deviation in time of the transition of the measured load shall be considered to occur at the moment when the signal crosses the threshold value (see 7.5.3). 7.7 Accuracy of measuring equipment
This standard does not specify the tolerance of the standard test negative number, nor the accuracy of the measuring equipment or test signal generator. DTE
Data signal (or control measurement)
. Timing signal
Figure 7 Same direction timing
DTE pull
According to the sugar signal (or control)
Timing signal
Figure 8 Reverse timing
DCE or
Timing circuit 114
The signal on S
Data and control example
The signal on the circuit
Timing computer 113
Or the signal on ×
Data and control
Circuit 1, the borrowing sign
GB/F15276—94
Reverse timing
Same time timing
Figure 9 Schematic diagram of signal quality parameters on the interchange circuit related to the sending direction New
Timing circuit 12th||tt| |Signal on
Data and control
Signal on circuit
Timing circuit 115 or s
Signal on
Data and control
Signal on circuit
GB/T15276-94
Reverse timing
Network timing
Figure 10 Schematic diagram of signal quality parameters on the interchange circuit related to the receiving direction Table 1 Signal quality characteristics 1
Duty cycle of signal code element timing
Accuracy of signal code element timing
Timing offset (same time)
Timing offset (reverse direction)
t0.013),4
50±10Www.bzxZ.net
0. 0 31-1
GB/T1527694
Continued Table 1
Duty cycle of signal symbol timing
Accuracy of signal symbol timing
Timing offset (reverse direction)
Timing offset (co-direction)
50±10
50±10
Note: 1) When using this table to classify DTE signal quality, the data signal rate, operating mode and environmental conditions can be shown to ensure integrity 2) The value of 30% takes into account the fact that the signal symbol timing can be obtained from a timing source provided by the network, such as circuit S 3) Where the DTE provides a synchronous network clock, the signal symbol timing accuracy may be a value different from ±0.01%, particularly for data transmission of primary modems. When the data signal rate is 48 kbit/s and 64 kbit/s, the required accuracy is ±0.002% and ±0.005% respectively. 4) When DTE provides timing and is directly connected to another DTE, the timing accuracy of signal code elements can be relaxed GB/T 15276-94
Appendix A
Directional classification of timing relations
(reference)
Taking the circuits recommended by GR3454 and GB11594 as examples, Table A1 gives the classification of timing relations in the same direction and reverse direction for different circuits. These circuits are shown in Figure A1.
Table A1 Direction meaning of timing relationship
Timing circuit
Data and control circuit
GB 3454
GB11594
Additional instructions,
GB 3454
GB3454
GB11594
According to the timing of receiving and sending
Sending DTE clock
Figure A1 Direction of timing and data interchange circuit This standard was proposed by the Ministry of Machinery and Electronics Industry of the People's Republic of China. This standard was drafted by the 30th Institute of the Ministry of Machinery and Electronics Industry. The main drafters of this standard are Wang Enrong and Zhang Jihong. x
GB 115942 Specifications of standard test load
The standard test load shall consist of a 4500 Ω resistor and capacitor C in parallel, and shall be connected between the signal interchange circuit under test and the signal common return line. The test arrangement is shown in Figure 3. The value of depends on the data signal rate and shall be as listed in the table of Figure 3. However, the value of this capacitor shall be reduced by the capacitor value included in the generator for waveform shaping. Tested interconnection circuit
Tested generator
Equivalent circuit of standard data transmission (including test equipment)
Data signal rate
kbit/s
5. 0 10. 0
10. 0-25. 0
25. 0~ 50. 0
Figure 3 Test arrangement and Cw value of GB7618 generator 7.3.3 Signal quality of transmitting DTE
GB/T 15276—94
The measurement should be carried out using a threshold value within the range of ±0.3V to determine the occurrence of signal transition. The threshold value is preferably selected as the nominal value 0V. 7.4 Measurement of GB7618 Load Characteristics
7.4.1 Test Arrangement
Measurement of signal quality on the load side of the interface shall be made using the test arrangement shown in Figure 4. Interchange Circuit Under Test
Test Signal Generator
7.4.2 Signal Quality of the Receiving DTE
Baihao Public Tongwei
Figure 4 Test Arrangement of GB7618 Load
Test Negative Oxygen
When the load under test is connected, the measurement shall be made using a ±4.0V ViL signal. The time deviation of the transition shall be considered to occur at the moment when the signal crosses the threshold value (see 7.3.3). 7.5 Measurement of GB7619 Generator Characteristics
7.5.1 Use of Standard Test Load
Measurement of signal quality shall be made on the generator side of a specific interchange circuit, which shall be connected using a standard test load. The standard test load may be the input impedance of the equipment or an external device, but in all cases the total load on the interchange circuit shall meet the requirements of 7.5.2.
7.5.2 Specification of the standard test load
The standard test load shall consist of a 100 Ω resistor and shall be connected between the output points A and B of the generator under test. The test arrangement is shown in Figure 5.
1 Equivalent impedance of the standard load (including the test equipment)
Test equipment
7.5.3 Quality of the signal transmitted by the DTE
Figure 5 Test arrangement for the GB7619 generator
GB/T 1527694
This measurement shall be made using a threshold value in the range of ±0.3V to determine the occurrence of signal skin change. The threshold value is preferably selected as the nominal value of 0V. 7.6 Measurements on the negative side of GB7619
7.6.1 Test arrangement
The quality of the signal on the interface load shall be measured using the test arrangement shown in Figure 6. Test signal generator
7.6.2 Quality of the signal on the receiving DTE
Figure 6 Test arrangement on the negative side of GB7619
When the load under test is connected, the measurement shall be made using a V signal of ±4.0 V. The deviation in time of the transition of the measured load shall be considered to occur at the moment when the signal crosses the threshold value (see 7.5.3). 7.7 Accuracy of measuring equipment
This standard does not specify the tolerance of the standard test negative number, nor the accuracy of the measuring equipment or test signal generator. DTE
Data signal (or control measurement)
. Timing signal
Figure 7 Same direction timing
DTE pull
According to the sugar signal (or control)
Timing signal
Figure 8 Reverse timing
DCE or
Timing circuit 114
The signal on S
Data and control example
The signal on the circuit
Timing computer 113
Or the signal on ×
Data and control
Circuit 1, the borrowing sign
GB/F15276—94
Reverse timing
Same time timing
Figure 9 Schematic diagram of signal quality parameters on the interchange circuit related to the sending direction New
Timing circuit 12th||tt| |Signal on
Data and control
Signal on circuit
Timing circuit 115 or s
Signal on
Data and control
Signal on circuit
GB/T15276-94
Reverse timing
Network timing
Figure 10 Schematic diagram of signal quality parameters on the interchange circuit related to the receiving direction Table 1 Signal quality characteristics 1
Duty cycle of signal code element timing
Accuracy of signal code element timing
Timing offset (same time)
Timing offset (reverse direction)
t0.013),4
50±10
0. 0 31-1
GB/T1527694
Continued Table 1
Duty cycle of signal symbol timing
Accuracy of signal symbol timing
Timing offset (reverse direction)
Timing offset (co-direction)
50±10
50±10
Note: 1) When using this table to classify DTE signal quality, the data signal rate, operating mode and environmental conditions can be shown to ensure integrity 2) The value of 30% takes into account the fact that the signal symbol timing can be obtained from a timing source provided by the network, such as circuit S 3) Where the DTE provides a synchronous network clock, the signal symbol timing accuracy may be a value different from ±0.01%, particularly for data transmission of primary modems. When the data signal rate is 48 kbit/s and 64 kbit/s, the required accuracy is ±0.002% and ±0.005% respectively. 4) When DTE provides timing and is directly connected to another DTE, the timing accuracy of signal code elements can be relaxed GB/T 15276-94
Appendix A
Directional classification of timing relations
(reference)
Taking the circuits recommended by GR3454 and GB11594 as examples, Table A1 gives the classification of timing relations in the same direction and reverse direction for different circuits. These circuits are shown in Figure A1.
Table A1 Direction of timing relationship
Timing circuit
Data and control circuit
GB 3454
GB11594
Additional instructions,
GB 3454
GB3454
GB11594
According to the timing of receiving and sending
Sending DTE clock
Figure A1 Direction of timing and data interchange circuit This standard was proposed by the Ministry of Machinery and Electronics Industry of the People's Republic of China. This standard was drafted by the 30th Institute of the Ministry of Machinery and Electronics Industry. The main drafters of this standard are Wang Enrong and Zhang Jihong. x
GB 115941 Use of standard test load
The signal quality measurement shall be made on the generator side of a specific interchange circuit, which shall be connected with a standard test load. The standard test load may be the input impedance of the equipment or an external device, but in all cases the total load on the interchange circuit shall meet the requirements of 7.5.2.
7.5.2 Specification of standard test load
The standard test load shall consist of a 100 Ω resistor and shall be connected between the output points A and B of the generator under test. The test arrangement is shown in Figure 5.
1 Equivalent voltage of standard load (including test equipment)
Test equipment under test
7.5.3 Quality of the signal transmitted by the DTE
Figure 5 Test arrangement for GB7619 generator
GB/T 1527694
This measurement shall be made using threshold values ​​in the range of ±0.3V to determine the occurrence of signal skin change. The threshold value should preferably be chosen to be the nominal value of 0 V. 7.6 Measurements on the negative side of GB7619
7.6.1 Test arrangement
The quality of the signal at the interface load shall be measured using the test arrangement shown in Figure 6. Test signal generator
7.6.2 Quality of the signal at the receiving DTE
Figure 6 Test arrangement on the negative side of GB7619
When the load under test is connected, the measurement shall be made using a V signal of ±4.0 V. The deviation in time of the transition of the measured load shall be considered to occur at the moment when the signal crosses the threshold value (see 7.5.3). 7.7 Accuracy of measuring equipment
This standard does not specify the tolerance of the negative side of the standard test, nor the accuracy of the measuring equipment or the test signal generator. DTE
Data signal (or control measurement)
. Timing signal
Figure 7 Same direction timing
DTE pull
According to the sugar signal (or control)
Timing signal
Figure 8 Reverse timing
DCE or
Timing circuit 114
The signal on S
Data and control example
The signal on the circuit
Timing computer 113
Or the signal on ×
Data and control
Circuit 1, the borrowing sign
GB/F15276—94
Reverse timing
Same time timing
Figure 9 Schematic diagram of signal quality parameters on the interchange circuit related to the sending direction New
Timing circuit 12th||tt| |Signal on
Data and control
Signal on circuit
Timing circuit 115 or s
Signal on
Data and control
Signal on circuit
GB/T15276-94
Reverse timing
Network timing
Figure 10 Schematic diagram of signal quality parameters on the interchange circuit related to the receiving direction Table 1 Signal quality characteristics 1
Duty cycle of signal code element timing
Accuracy of signal code element timing
Timing offset (same time)
Timing offset (reverse direction)
t0.013),4
50±10
0. 0 31-1
GB/T1527694
Continued Table 1
Duty cycle of signal symbol timing
Accuracy of signal symbol timing
Timing offset (reverse direction)
Timing offset (co-direction)
50±10
50±10
Note: 1) When using this table to classify DTE signal quality, the data signal rate, operating mode and environmental conditions can be shown to ensure integrity 2) The value of 30% takes into account the fact that the signal symbol timing can be obtained from a timing source provided by the network, such as circuit S 3) Where the DTE provides a synchronous network clock, the signal symbol timing accuracy may be a value different from ±0.01%, particularly for data transmission of primary modems. When the data signal rate is 48 kbit/s and 64 kbit/s, the required accuracy is ±0.002% and ±0.005% respectively. 4) When DTE provides timing and is directly connected to another DTE, the timing accuracy of signal code elements can be relaxed GB/T 15276-94
Appendix A
Directional classification of timing relations
(reference)
Taking the circuits recommended by GR3454 and GB11594 as examples, Table A1 gives the classification of timing relations in the same direction and reverse direction for different circuits. These circuits are shown in Figure A1.
Table A1 Direction of timing relationship
Timing circuit
Data and control circuit
GB 3454
GB11594
Additional instructions,
GB 3454
GB3454
GB11594
According to the timing of receiving and sending
Sending DTE clock
Figure A1 Direction of timing and data interchange circuit This standard was proposed by the Ministry of Machinery and Electronics Industry of the People's Republic of China. This standard was drafted by the 30th Institute of the Ministry of Machinery and Electronics Industry. The main drafters of this standard are Wang Enrong and Zhang Jihong. x
GB 115941 Use of standard test load
The signal quality measurement shall be made on the generator side of a specific interchange circuit, which shall be connected with a standard test load. The standard test load may be the input impedance of the equipment or an external device, but in all cases the total load on the interchange circuit shall meet the requirements of 7.5.2.
7.5.2 Specification of standard test load
The standard test load shall consist of a 100 Ω resistor and shall be connected between the output points A and B of the generator under test. The test arrangement is shown in Figure 5.
1 Equivalent voltage of standard load (including test equipment)
Test equipment under test
7.5.3 Quality of the signal transmitted by the DTE
Figure 5 Test arrangement for GB7619 generator
GB/T 1527694
This measurement shall be made using threshold values ​​in the range of ±0.3V to determine the occurrence of signal skin change. The threshold value should preferably be chosen to be the nominal value of 0 V. 7.6 Measurements on the negative side of GB7619
7.6.1 Test arrangement
The quality of the signal at the interface load shall be measured using the test arrangement shown in Figure 6. Test signal generator
7.6.2 Quality of the signal at the receiving DTE
Figure 6 Test arrangement on the negative side of GB7619
When the load under test is connected, the measurement shall be made using a V signal of ±4.0 V. The deviation in time of the transition of the measured load shall be considered to occur at the moment when the signal crosses the threshold value (see 7.5.3). 7.7 Accuracy of measuring equipment
This standard does not specify the tolerance of the negative side of the standard test, nor the accuracy of the measuring equipment or the test signal generator. DTE
Data signal (or control measurement)
. Timing signal
Figure 7 Same direction timing
DTE pull
According to the sugar signal (or control)
Timing signal
Figure 8 Reverse timing
DCE or
Timing circuit 114
The signal on S
Data and control example
The signal on the circuit
Timing computer 113
Or the signal on ×
Data and control
Circuit 1, the borrowing sign
GB/F15276—94
Reverse timing
Same time timing
Figure 9 Schematic diagram of signal quality parameters on the interchange circuit related to the sending direction New
Timing circuit 12th||tt| |Signal on
Data and control
Signal on circuit
Timing circuit 115 or s
Signal on
Data and control
Signal on circuit
GB/T15276-94
Reverse timing
Network timing
Figure 10 Schematic diagram of signal quality parameters on the interchange circuit related to the receiving direction Table 1 Signal quality characteristics 1
Duty cycle of signal code element timing
Accuracy of signal code element timing
Timing offset (same time)
Timing offset (reverse direction)
t0.013),4
50±10
0. 0 31-1
GB/T1527694
Continued Table 1
Duty cycle of signal symbol timing
Accuracy of signal symbol timing
Timing offset (reverse direction)
Timing offset (co-direction)
50±10
50±10
Note: 1) When using this table to classify DTE signal quality, the data signal rate, operating mode and environmental conditions can be shown to ensure integrity 2) The value of 30% takes into account the fact that the signal symbol timing can be obtained from a timing source provided by the network, such as circuit S 3) Where the DTE provides a synchronous network clock, the signal symbol timing accuracy may be a value different from ±0.01%, particularly for data transmission of primary modems. When the data signal rate is 48 kbit/s and 64 kbit/s, the required accuracy is ±0.002% and ±0.005% respectively. 4) When DTE provides timing and is directly connected to another DTE, the timing accuracy of signal code elements can be relaxed GB/T 15276-94
Appendix A
Directional classification of timing relations
(reference)
Taking the circuits recommended by GR3454 and GB11594 as examples, Table A1 gives the classification of timing relations in the same direction and reverse direction for different circuits. These circuits are shown in Figure A1.
Table A1 Direction of timing relationship
Timing circuit
Data and control circuit
GB 3454
GB11594
Additional instructions,
GB 3454
GB3454
GB11594
According to the timing of receiving and sending
Sending DTE clock
Figure A1 Direction of timing and data interchange circuit This standard was proposed by the Ministry of Machinery and Electronics Industry of the People's Republic of China. This standard was drafted by the 30th Institute of the Ministry of Machinery and Electronics Industry. The main drafters of this standard are Wang Enrong and Zhang Jihong. x
GB 115940 31-1
GB/T1527694
Continued Table 1
Duty cycle of signal symbol timing
Accuracy of signal symbol timing
Timing offset (reverse direction)
Timing offset (co-direction)
50±10
50±10
Note: 1) When using this table to classify DTE signal quality, the data signal rate, operating mode and environmental conditions can be shown to ensure integrity 2) The value of 30% takes into account the fact that the signal symbol timing can be obtained from a timing source provided by the network, such as circuit S 3) Where the DTE provides a synchronous network clock, the signal symbol timing accuracy may be a value different from ±0.01%, particularly for data transmission of primary modems. When the data signal rate is 48 kbit/s and 64 kbit/s, the required accuracy is ±0.002% and ±0.005% respectively. 4) When DTE provides timing and is directly connected to another DTE, the timing accuracy of signal code elements can be relaxed GB/T 15276-94
Appendix A
Directional classification of timing relations
(reference)
Taking the circuits recommended by GR3454 and GB11594 as examples, Table A1 gives the classification of timing relations in the same direction and reverse direction for different circuits. These circuits are shown in Figure A1.
Table A1 Direction of timing relationship
Timing circuit
Data and control circuit
GB 3454
GB11594
Additional instructions,
GB 3454
GB3454
GB11594
According to the timing of receiving and sending
Sending DTE clock
Figure A1 Direction of timing and data interchange circuit This standard was proposed by the Ministry of Machinery and Electronics Industry of the People's Republic of China. This standard was drafted by the 30th Institute of the Ministry of Machinery and Electronics Industry. The main drafters of this standard are Wang Enrong and Zhang Jihong. x
GB 115940 31-1
GB/T1527694
Continued Table 1
Duty cycle of signal symbol timing
Accuracy of signal symbol timing
Timing offset (reverse direction)
Timing offset (co-direction)
50±10
50±10
Note: 1) When using this table to classify DTE signal quality, the data signal rate, operating mode and environmental conditions can be shown to ensure integrity 2) The value of 30% takes into account the fact that the signal symbol timing can be obtained from a timing source provided by the network, such as circuit S 3) Where the DTE provides a synchronous network clock, the signal symbol timing accuracy may be a value different from ±0.01%, particularly for data transmission of primary modems. When the data signal rate is 48 kbit/s and 64 kbit/s, the required accuracy is ±0.002% and ±0.005% respectively. 4) When DTE provides timing and is directly connected to another DTE, the timing accuracy of signal code elements can be relaxed GB/T 15276-94
Appendix A
Directional classification of timing relations
(reference)
Taking the circuits recommended by GR3454 and GB11594 as examples, Table A1 gives the classification of timing relations in the same direction and reverse direction for different circuits. These circuits are shown in Figure A1.
Table A1 Direction of timing relationship
Timing circuit
Data and control circuit
GB 3454
GB11594
Additional instructions,
GB 3454
GB3454
GB11594
According to the timing of receiving and sending
Sending DTE clock
Figure A1 Direction of timing and data interchange circuit This standard was proposed by the Ministry of Machinery and Electronics Industry of the People's Republic of China. This standard was drafted by the 30th Institute of the Ministry of Machinery and Electronics Industry. The main drafters of this standard are Wang Enrong and Zhang Jihong. x
GB 11594
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