GB/T 14862-1993 Test method for thermal resistance from junction to case of semiconductor integrated circuit package
Some standard content:
National Standard of the People's Republic of China
Junction-to-case thermal resistance test methods of packagesfnr semiconductor integrated circuits1 Subject content and applicable scopeWww.bzxZ.net
This standard specifies the test method for the junction-to-case thermal resistance of semiconductor integrated circuit packages. GE/T 14862 : 93
This standard applies to the measurement of the junction-to-case thermal resistance of ceramic, metal and plastic packages of semiconductor integrated circuits. 2 Reference standards
GB/T4113 Semiconductor integrated circuit packaging terminology GJB548 Microelectronic device test methods and procedures 3 Terminology, special code
3.1.1 Thermal test chip thermal test chip A chip designed to characterize the thermal characteristics of integrated circuit packages. 3.1.2 Device under test device under test A microelectronic device equipped with a thermal test chip for measuring the thermal resistance of the package. 3.1.3 Junction temperature Tjunction temperatureT; Indicates the temperature of the semiconductor junction of the main heat-producing part in the microcircuit. 3.1.4 PhlicatingPowerP. The power applied to the device to produce a temperature difference from the junction to the reference point. 3.1.5 TSP termperature-scnsitive parameter TSP is an electrical characteristic that is related to the measured junction temperature and can be calibrated to detect the required junction temperature. 3.2 Symbols and codes
3.2.1R: Junction to reference point thermal resistance
3.2.2Rec: Junction to case thermal resistance
3.2.3KeM: Junction to mounting surface thermal resistance
3.2.4Tr: Reference point temperature
3.2.5Tmc: Calibration temperature
3.2.6VMH: Thermal parameter value
This parameter is measured at the junction temperature produced by the test current (Im) and the corresponding heating power (PH). 3.2.7 Vmc: Temperature sensitive parameter value
This parameter is measured at the test current (I) and the specified calibration temperature (TM:). Approved by the State Administration of Technical Supervision on December 30, 1993 and implemented on October 1, 1994
4 Test method
GB/T1486293
This test method uses a thermal test chip to determine the thermal resistance of ceramic, metal and plastic packages from junction to housing or junction to mounting surface. For ceramic and metal packages, it can be carried out in a heat sink and liquid tank test environment, and for plastic packages, it is limited to a liquid tank test environment. 4.2 Overview
The thermal resistance of a semiconductor integrated circuit package is a measure of the ability of the integrated circuit carrier or package and the mounting technology to dissipate heat from the semiconductor junction. When the housing or mounting surface temperature, heating power and junction temperature are known, the thermal resistance can be calculated. The junction temperature of the chip is indirectly indicated by measuring the junction temperature of the semiconductor element on the thermal test chip before and after the power meter. The temperature sensitive parameters usually used to indirectly measure the junction temperature are the forward voltage of the diode and the voltage between the emitter and the base of the bipolar transistor. When the junction voltage of the functional part of the thermal test chip is not suitable as a temperature sensitive parameter, other appropriate temperature sensitive parameters can also be used to indirectly measure the junction temperature: for example, the substrate diode arm of the junction-isolated monolithic integrated circuit. However, in this special case, the heating power must be turned on while the substrate diode is in forward bias.
When making the specified measurement, the package should be considered to have reached thermal equilibrium. That is, when the time from power application to data reading is reduced by half, the indicated result will not produce errors under the required measurement accuracy. The thermal resistance of the integrated circuit package is measured using the thermistor on the thermal test chip. In order to obtain a true estimate of the working junction filter, the entire chip in the package should be heated to obtain a proper internal temperature distribution. During the junction temperature measurement, the chip heating power should remain unchanged, and the calibration current of the junction should also remain stable.
4.3 Test device
4.3.1 Thermocouple
When the test temperature range is -100～300℃, the thermocouple material shall be constantan (T type) or equivalent material, the wire specification shall not be greater than the wire diameter 0.250mm, the junction of the thermocouple shall be melted into a ball and shall not be welded or twisted, and the uncertainty of the thermocouple and related test system shall be ±0.5℃. 4.3.2 Electrical equipment
Auxiliary power supply with adjustable power supply:
Thermosensitive parameter measuring instrument, voltage resolution is 0.5inV:c
Temperature controllable constant temperature device, uncertainty is t:0.5℃. 4.3.3 Heat dissipation device
The heat dissipation device consists of a temperature controller, a liquid circulator and a main heat sink. The typical heat dissipation device used to install the device under test is shown in Figure 1, which can maintain the temperature of the specified reference point within ±0.5℃ of the preset measurement value. The radiator uses liquid circulation to control the temperature of water cooling. To measure the water temperature at the inlet and outlet, the thermocouple sensor, adapter or radiator should be tightly attached to the heat dissipation surface of the main radiator and have a specific geometric shape to facilitate the installation of various external wastes, such as flat packages, dual-row packages, chip carriers, etc. The mounting surface temperature can be measured from the side or bottom of the adapter by a thermocouple. The thermocouple is tightly attached to the adapter and package interface or near the interface with thermal conductive glue or thermal conductive grease. The temperature of the device under test at this point is specified and controllable. The adapter includes a socket or other interconnection system, and a thin thermal conductive grease such as zinc oxide silicone grease with a thickness of 23 to 50 μm is usually applied to the interface to provide reliable thermal contact. GB/T14862-93
Loss controller
Heater
Liquid circulator
Figure 1 Schematic diagram of temperature controllable heat dissipation device
4.3.4 Liquid tank device
The liquid tank device consists of a temperature controller, a liquid circulator and a liquid tank. A typical temperature controllable liquid tank is shown in Figure 2, which can maintain the temperature of a specified reference point within ±0.5 of a predetermined measurement value. The device under test is installed in the liquid tank, and the liquid in the tank should be stirred continuously to ensure the required temperature stability. Due to this "working flow" as an "infinite heat sink", the temperature of the shell to the liquid (environment) at the reference point will be reduced to a minimum, that is, less than or equal to 20°C. If the temperature difference between the shell and the liquid is large-F20°C, the temperature gradient of the liquid film boundary layer on the interface between the package and the liquid will change greatly, which will bring difficulties to the test accuracy and repeatability. The temperature difference between the shell and the liquid can be reduced by increasing the liquid flow rate and reducing the power density borne by the liquid. During the test, the device under test should be mounted in a manner that does not interfere with the transfer of heat to the liquid. For devices with leads, the orientation of the leads should not interfere with the transfer of heat to the liquid and should not affect the flow of heat generated by the power consumption in the package. In order to reduce the heat conduction of the leads, a wire with a diameter of 0.125 mm should be used to connect the socket of the device under test to a dedicated socket rack. The shell temperature of the device under test can be measured by a thermocouple close to the shell and cannot be assumed to be the liquid temperature. The liquid used has a thermal conductivity of at least 0.06 W/(m·℃) at 25℃: suitable coolants are inert fluoroquine liquid and silicone oil. Temperature Conditioner
Fluid Structure
Figure 2 Schematic diagram of temperature-controlled liquid tank device 4.4 Test Procedure
4.4.1 Sample Preparation
Select appropriate thermal test chips according to the requirements of Appendix A and assemble them into microelectronic devices with thermal resistance to be measured. 4. 4. 2 Measurement of thermal conductivity Tc
CB/T14862—93
To measure the thermal resistance of the device under test, the shell temperature should be measured at the part of the shell surface with the highest accessible temperature. When determining this reference point, the device under test should operate in a windless environment and without an external heat sink. Usually this reference point is located on the outer surface of the bottom of the package just below the core, that is, on the main heat flow path from the chip to the heat sink or the external environment. 3 represents the reference point position for the two conditions of the ceramic package core cavity facing upward and downward. For the package with an integral heat sink attached to the outer surface of the bottom of the package, the shell temperature reference point should be located at the corresponding position of the heater surface and the back of the chip, as shown in Figure 4.
Ceramic fluid
(a) Ceramic package with core upward
Zero temperature point
Complete temperature check point
Printed board
(b) Ceramic package with core downward
Figure 3 Reference point position for measuring shell temperature
Special point
Printed board
Integral heat sink
Figure 4 Reference point position for measuring shell temperature of ceramic package with integral heat sink T. During measurement, the device under test should be installed as required to keep the shell temperature at the specified value. (Usually T. 60 is selected). The thermocouple should be placed close to the device package surface under the core, and thermal conductive epoxy resin can be used for this purpose. When it is found that the thermocouple ball cannot be directly attached to the shell, solder the thermocouple ball to a diameter of 2.5mm, 0.2mm thick steel alloy disc, then use a thin layer of adhesive to stick the other side of the beryllium copper alloy disc to the position to be measured on the housing, and keep a parallel gap between the disc and the package housing. 4.4.3 Measurement of mounting surface temperature T
The mounting surface temperature is measured directly below the main heat dissipation surface of the device under test, and is measured by a thermocouple directly fixed to (or close to) the mounting surface of the heat sink. Figure 5 shows a typical installation. The copper surface of the mounting base (main heat sink) should be nickel-bonded to prevent oxidation. GB/T 14862:93
Drill holes in the mounting base to install thermocouples. Make the thermocouple lead wire just below the external temperature area to be measured. It is recommended that the thermocouple be fastened to the mounting base with thermally conductive adhesive or solder. At the same time, special attention should be paid to minimizing the air gap around the thermocouple junction. Apply thermal grease or adhesive to the interface between the mounting base and the device under test. Heat conductive grease or adhesive should be used to cover the chip.
Conductive grease
Good thermal bonding and welding
Strong dissipation
Figure 5 Measurement of mounting surface temperature
4.4. 4 Measurement of junction temperature
4.4.4.1 Measurement of temperature coefficient of temperature-sensitive parameter TSP (calibration) The temperature coefficient of the temperature-sensitive parameter is obtained by externally heating the device under test in a constant temperature tube or a reduced body tank tube, and measuring the relationship between TSP and the reference point temperature when a certain test current passes through it. The reference point temperature range in the calibration shall include the range of temperatures involved in the heating power test (see 4.4.4.2). The test current is generally selected so that the TSP decreases linearly with temperature over the entire given range and the heat generated by the current at the silicon and metal contacts is negligible. In order to determine the best TSP calibration or test current, a VMc-logIM curve should be made at the two temperature points at the end of the required calibration range. The optimal test current is then selected from the linear segments of the two Vmc-logIm curves. The test current range is generally 0.05 to 5 mA, depending on the operating conditions and specification values of the device under test when measuring TSP. When a specific test current is used in the test, the value of the TSP temperature coefficient AVMc/ATMc can be calculated with the help of the calibration curve of VMc-T\Mc. To determine this coefficient, at least three points are used to determine the voltage and temperature curve. 4.4.4.2 Measurement of VmcVMH and PH The heating power test is carried out in steps and the reference temperature T' is kept constant at the predetermined value. The first step is to measure TSP, that is, to measure VM value under the condition that the test current I is selected to be the value used in the calibration process (see 4.4.4.1). The second step is to make the device under test work under the heating power P, while the test current I remains unchanged, and measure the value of V>H. The selection of heating power P should make the temperature difference from the junction to the reference point greater than or equal to 20C when measuring V. At the same time, in order to avoid affecting the insulation between the temperature sensitive components on the chip and the heating circuit, the device under test should not work under excessive heating power. In addition, excessive power consumption on the package leads and bonding wires will cause the power dissipation on the active area of the chip to exceed the predetermined range, so the heating power should be avoided to be greater than the design value of the wiring system in the package. The measurement basis of
PH should be determined according to the selected chip, but the accuracy should be maintained. Under the above test conditions, record the following data: a. Temperature-sensitive electrical parameters (Vr, VE or other suitable TSP); b. Junction temperature T calculated by the following formula:
T = T'R + (VMH -- VmC)(AVMC/ATMC)-1..com formula: Tk=Tc (or Tm):
e. Case temperature Tc or mounting surface temperature TM:
d. Heating power PH;
GB/T 14862-93
Installation method (including the pressure on the device under test during installation and the thermocouple attachment method or liquid temperature). e.
4.4.5 Calculation of package thermal resistance K
Measure the junction overflow T according to the procedures of 4.4.1, 4.4-2, 4, 4.3 and 4.4.4, and then calculate the thermal resistance from the junction to the reference point of the package. R = (T,- TR)/FH
Where: ReiR=Rac (or Rm).
Test report
The test report should include the following contents:
Packaging conditions, including thermal test chip, shell temperature measurement position, card heat sink structure and installation method; test conditions used,
test voltage, current and heating power of thermal test chip: record data under each test condition;
The meaning of thermal characteristic text symbols;
Test results.
GB/T1486293
Appendix A
Thermal test chip
(Supplement)
This appendix specifies the design requirements and sample data format of thermal test chip. A2 Design requirements
A2.1 Heat source
The heat source is a resistor bar or a transistor. The effective chip area should be used as much as possible so that the measured package thermal resistance can represent the package area used. The total width of the bonding area and the scribe area is 0.25mm (see Figure A1). The chip size range used can measure the package heat as a function of the chip size. The recommended size of the basic unit is 1:90mm×1.90mm, and its power consumption capacity is 7.5~10W. The heat source area should exceed 85% of the effective chip area of the basic unit. The basic unit can be arranged in an array to a maximum of 11.40mm×11.10mm square chips.
a Basic single thermal test chip
Figure Thermistor
County Heating element area
Cooperation area
A2.2 Heat source spacing
GB/T 14862
Array thermal test chip
Figure A1 Thermal test chip
The heat source spacing required to accommodate thermistor, i.e., PN junction, should not be greater than 0.50 mm, and thermistor should be located at the center of the chip surface. For the eleven chips arranged in standard units, it is also required that the sensitive element is close to one corner of the basic unit and between two adjacent corners, i.e., close to the passive area or located in the passive area. When appropriate, additional thermal optical components for evaluating chip bonding and uneven power consumption can also be included. All thermal elements and the metallized channels connected to them must be electrically insulated from the heat source. A2.3 The thickness of the thermal test chip
should be 0.46~0.56 mm.
A2.4 Design principles for thermal test chips
The power consumption limit should be consistent with the range of package thermal resistance involved, including the reasonable design of the metallization pattern. For array chips, when the heating current is applied to the internal chip, the bonding wire from the package to the internal chip is the shortest, requiring the ability to produce at least a 20° temperature difference from the chip surface to the shell. For this reason, for chips mounted on various substrates (such as lead oxide, beryllium oxide, etc.), the basic unit with a side of 1.90 mm should be able to dissipate at least 7.5W of power. GB/T14B62—93
A2.5 Bonding area
The length of each side of the bonding area should be equal to or greater than 0.1mm. Thermistors and heating elements cannot be connected to the common bonding area. For array chips, the location and size of the bonding area should facilitate the bonding between basic units and minimize the bonding wires from the package to the chip. A2.6 Thermistor diodes or "bridge-type elements" should be able to be used in the entire heating power and temperature range of the thermal test chip. At least when the junction temperature rises to 130°C, the thermal test chip can still work normally.
A2.7 Array-type and proportionally enlarged thermal test chips. The array-type thermal test chip is shown in Figure A1b, and the proportionally enlarged thermal test chip is shown in Figure A2. The heating element (shaded area) is a number of transistors or electric strips connected in series and parallel inside and outside the chip. The heating element should be as full as possible in the shaded area as in the actual circuit (in accordance with the layout design rules of the integrated circuit).
Thermistor element properties||tt| |Heating Element Area
Oral Health Association Area
A3 Sample Data Format
Figure A2 Scaled-up Thermal Test Chip
A3.1 General Description
The thermal test chip is a bipolar or MOS silicon chip, which has a metallized upper surface or metallized upper and lower surfaces and a transistor or resistor (metal film, polysilicon, ion implanted resistor or diffused resistor) for heating, as well as a transistor eb junction and a diode PN junction in the form of a diode or a diode bridge as a thermal sensitive element. This chip is designed to characterize the thermal characteristics of integrated circuit packages. A3.2 Mechanical Description
Chip diagram showing the location and dimensions of thermistors, heating elements, interconnects and bonding areas on the chip, marking all bonding areas and indicating the bonding areas that must be connected to the most positive or negative applied bias. Indication of whether the bottom (back) of the chip needs to be electrically connected for normal operation. Chip thickness.
All necessary handling and chip testing precautions. Type of metallization layer used on the chip surface bonding area and bottom mounting surface. Type of passivation used and any special chip mounting environment requirements, indicating the best chip bonding and wire bonding procedures. Wire bonding diagrams for various chip arrays, and indicating the limiting values of heating power. A3.3 Maximum ratings
A3.3.1 Temperature
Storage temperature range T.:
b. Operating junction temperature range T:
A3.3.2 Voltage in the full operating temperature range
GB/T14862-93
DC voltage applied to the collector of the heating transistor or the heating resistor (limited by the reverse breakdown voltage of the substrate diode) VH:V
A3.3.3 Current in the full operating temperature range
DC current I applied to the collector of the heating transistor or the heating resistor:A3.4 Electrical characteristics
A3.4.1 Thermistor (diode)
Reverse leakage current Ih=
Applied to the thermistor PN junction, and ensure that its temperature coefficient is Linear forward measurement current range IM-b.
Forward voltage drop Vm-c at maximum measurement current and Ta=25℃
43.4.2 Heating element (transistor or resistor) a.
Forward current transfer ratio of transistor heating element at maximum collector voltage and collector current at T-25℃ b. Resistance RH of resistor heating element at TA=25℃3.5 Supplementary material
The maximum power capacity of the chip is related to the bonding and lead of the chip. When the chip is installed in a ceramic package, the following electrical characteristics can be obtained for the heating element:
Maximum rated power P at Tc-25℃=
Additional instructions:
This standard is proposed by the Ministry of Machinery and Electronics Industry of the People's Republic of China. This standard is formulated by the Packaging Working Group of the National Integrated Circuit Standardization Technical Committee. This standard was drafted by Shanghai Radio Factory No. 7, Shanghai Radio Factory No. 19, and the Institute of Microelectronics of Tsinghua University. The main drafters of this standard were Ye Zengda, Fang Liming, and Mao Songliang.
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