GB/T 4588.4-1996 Sectional specification for multilayer printed boards
other information
Release date:1988-12-30
Review date:2004-10-14
drafter:Tong Xiaoming, Chen Yingshu
Drafting unit:The 15th Research Institute of the Ministry of Mechanical and Electrical Engineering
Focal point unit:National Technical Committee for Printed Circuit Standardization
Proposing unit:Ministry of Electronics Industry of the People's Republic of China
Publishing department:State Bureau of Technical Supervision
competent authority:Ministry of Information Industry (Electronics)
Some standard content:
GB/1 4588.4--1996
At present, the International Electrotechnical Commission has not yet issued a formal standard for printed board quality certification. This standard adopts the temporary specification IEC/PQC91≤ sub-specification of the International Electrotechnical Commission's electronic component quality assessment system: multilayer printed boards (IEC/PQC23300 sub-specification: multilayer printed boards) to adapt to the needs of quality certification, international trade, technical and economic exchanges of such products as well as the development of international standards as soon as possible.
This standard has the following changes to IFC/PQC91:1990: 1) In the original text, the last paragraph of "PQC Introduction" is wrong (clause number): and it has been corrected in the "PQC Introduction" of this standard. 2) The second 8.3 in the original text is changed to 8.4. 3) "CECC 00010 printed board test method quoted in 1.2 Related documents" is deleted because it is not quoted in the test method of the performance table.
4) "CECC 00010 printed board test method quoted in 1.2 Related documents" is added. 00114/E "Competence Approval of Electronic Components Manufacturers\ and\ CECC00111 CECC Procedure 11: Current Model", because it is quoted in the text, the correspondence between my country's standards and IEC standards is as follows: IEC. Standard
IEC/PQC88
TFC194
IEC:326-2
IEC326-3
Corresponding national standards
GB/15261--1996 General Specification for Printed Boards (Equivalent) GB/T2036-94 Printed Circuit Boards Terminology (reference) GB4677-84 Test methods for printed boards (technical equivalent) GB4588.388 Design and use of printed circuit boards (technical equivalent) This standard replaces GB4588.4-88 from the date of implementation. This standard is proposed by the Ministry of Electronics Industry of the People's Republic of China: This standard is approved by the National Technical Committee for Printed Circuit Standardization. The drafting unit of this standard is the Standardization Research Institute of the Ministry of Electronics Industry. The ten drafters of this standard are Tong Xiaoming and Chen Yingshu. GB/T4588.4--1996
PQC Introduction
IFC (International Federation of Standardization Commissions) The electronic component quality assessment system of the IEC (International Commission for Standardization) is carried out under the authorization of the IEC. The purpose of the system is to stipulate the quality assessment procedures so that the electronic components released by member countries in accordance with the corresponding specifications can be equally accepted by all members without further testing. The interim specification was issued by the UK National Committee (UKNAT) in August 1989 in accordance with the procedures specified in 8.3 of QC001002iIEC Electronic Component Quality Assessment System (IFCQ) Rules of Procedure. (I:K)69; sub-specification: multilayer printed boards) was issued for comment, and then formulated according to the February 1990 report CMC (Secretariat) 287 rain, which is equivalent to the European Training Electrotechnical Standardization Committee (CENELEC) Electronic Charge Devices Committee (CECC) standard CECC23300:1985 sub-specification: multilayer printed boards and amendment No. 1 (1986). Terms and Terms (FCC: The text of the current standard shall be modified as the IFC Provisional Specification (PQC) when it is approved for publication: In 1.1.2, 3.1. of this specification. 2, 3.1. In 3, 6 and 7, the referenced CFCC 23000 shall be replaced by IEC/PQC 88. The corresponding CECC specifications and corresponding IEC standards are as follows: CECC Standards
CECC 00010
CECC23000
Corresponding IEC Standards
IEC326-2: Test Methods for Printed Boards (Technical Equivalence)IEC/PQC88: General Specification for Printed Boards (Same)GB/T4588.4—1996
CECC Foreword
The Components Committee (CECC) of the European Committee for Electrotechnical Standardization (CFNEL.FC) is composed of member countries of the European Committee for Electrotechnical Standardization that wish to participate in the electronic components quality assessment coordination system: the purpose of the system is to promote international trade by coordinating electronic component specifications and quality assessment procedures and recognizing international identification marks or certificates of conformity. Components produced in accordance with this system can be accepted by all member states without further testing. This specification is developed by member states of the CECC system that wish to develop their own coordinated "Multilayer Printed Board Section Specification (SS)" and has been formally approved by CECC. It is used in conjunction with the procedural rules of the CECC system. The member states of CECC at the time of publication of this specification are Austria, Belgium, Denmark, Finland, France, Germany, Ireland, Italy, the Netherlands, Norway, Iran, Spain, Sweden, Switzerland and the United Kingdom. Copies can be obtained from the address of Ma Ming on the blue cover. CECC Preface
This specification was developed by CECC Working Group 23: "Printed Circuits". This specification is based on the standards of the International Electrotechnical Commission (IEC). The text of this specification was sent to CECC for voting in the following documents and was approved by the Chairman of CECC as a CECC specification. Documents
CECC (Secretariat) 1054/1054A
CECC (Secretariat) 1549
Secretary's Note
Voting Month
November 1981
1084
Voting Report
CECC (Secretariat) 1252
CECC (Secretariat) 1640
Since the Chinese industry is in urgent need of this specification, the Chairman of CECC has decided to publish this standard without going through a full editing process, so users of this specification should report any errors they find to the Secretary-General of CECC so that amendments can be made. The initial version of the text was in English and German, and a French version was immediately prepared. 1 Introduction
National Standard of the People's Republic of China
Sectional specification-Multilayer printed boards
GB/T 4588.4-1996
idt IEC/PQC 91:1990
Generation GR 4588. 488
IEC326-6 is the IEC standard for multilayer printed boards. The following documents are part of this standard and are consistent with GB/T162611996 General Specification for Printed Boards. These documents are supplementary materials required for the assessment of printed boards according to the European Committee for Electrotechnical Standardization (CENELEC) electronic component quality assessment system.
1. 1. Scope and purpose
This standard is a multilayer printed circuit specification (SS) for mounting components, regardless of the manufacturing method. This specification specifies the performance and test methods to be evaluated by batch testing and quality consistency inspection (batch inspection and periodic inspection). 1.2 Related documents
GB/T20364 Printed circuit terminology
CB4588.3-85 Design and use of printed circuit boards CB/T152611996 General specification for printed boards
1EC68 Basic environmental test environment
IFC249 Metal foil substrates for printed circuits 1EC321 Guide for the design and use of components for mounting on printed boards IEC326-2 Test methods for printed boards
CECC00111 CECC procedure rules I: specifications
CECC00114/Ⅱ Manufacturing of electronic components! 2. Overview of Capability Standards
This sub-specification () is applicable to multi-layer printed boards. It is the basis for the development of the following specifications: Capability Detailed Specification (CapT>S) applies to special materials specified in TEC:24.9-2 for use in the capability approval process. If necessary, derivative materials may have a capability detailed specification: Capability detailed specifications can be developed by international or national organizations or manufacturers (CECC00111). User Detailed Specification (CDS) applies to printed boards constructed by users in accordance with the provisions of Chapter 5 of GB/T16261. User detailed specifications are usually developed by users and compiled into their own systems. GR/T16261 and CFCC 00114/H specify further details. Table I specifies the basic properties that are generally considered to be important for multi-layer printed boards and the appropriate test methods for verifying these properties. Table 1 specifies the additional properties that may be important for certain multi-layer printed boards or for certain applications and the appropriate test methods for verifying these properties. If necessary, the relevant specifications can refer to the performance and test methods in Table 1. For test items that must be supplemented with test details in the relevant specifications,The relevant columns are marked with a symbol and the details of these provisions shall be consistent with IEC 326-2. Approved by the National Technical Supervision Commission on December 31, 1996
Implementation on August 1, 1997
GB/T 4588.4-1996
Table I specifies the capability test plan, using the specified comprehensive test pattern (CTP) test board as the capability identification element, and the table specifies the data for quality consistency inspection. These tables do not specify the test sequence. Unless otherwise specified, the tests can be carried out in any order. 3 Test specimens
3.1 Capability batch
3.1.1 Basic capability
The basic capability test shall be carried out on the comprehensive test pattern specified in Chapter 8. 3.1.2 The incremental capacity
shall adopt the performance specified in 3.5.3 of GB/T 1626. The multiple combination of comprehensive test patterns is shown in Chapter 8. 3.1.3 The maintenance approved by the party
shall adopt 3.8 of GB/T 16261. 3.2 Quality consistency inspection
Unless otherwise specified, finished boards and (or) specially designed test patterns may be used for batch inspection and periodic inspection: specially designed test patterns may be included in the production, and they may be designed based on appropriate patterns in the comprehensive test patterns in Chapter 8. The passband must be agreed upon by the manufacturer and the user
4 Relevant specifications
The term "relevant specifications" means the product specifications of an actual printed board, which, when used, are the user's detailed specifications and capability detailed specifications for applicable specific materials and technologies.
The relevant specifications should include all the information necessary to clearly and completely specify the printed board, preferably in accordance with the provisions in GB4588.3. Care should be taken to avoid unnecessary provisions, and the allowable deviations should be stated where they are really needed; when the use of the unbiased nominal value or the simple maximum value or the simple minimum value is sufficient, only the unbiased nominal value or the simple maximum value should be specified. Mandatory value or simple minimum value: When deviation is necessary only in certain areas or parts of the printed board, only these areas or parts should be specified. If there are several deviation levels, it is best to select from the levels specified in GB4588.3. If there is a conflict between the user's detailed specification and any other relevant specification (such as BS, GS or SS), the user's detailed specification shall prevail. 5 Printed board performance
The basic performance of multilayer printed boards is specified in Table I, and the additional performance of multilayer printed boards is specified in Table I. General inspection
Consistency, marking
External weak links such as workmanship quality
Metalized holes
Wire defects
Conductor defects
Dimensional inspection
Board dimensions
IEC3262
Test number
1b or ic
Printed plug part thickness
GB/T 4588.4-1996 Basic performance The defects specified in the relevant specifications shall be tested in section Comprehensive test Graphic test The entire comprehensive graphics, logos, identification symbols, materials and plating test graphics shall comply with the relevant specifications and only defects shall be shown. The board shall be in good condition. The galvanized hole should be clean and free of any impurities that may affect the entry and exhaustibility of components. The total area of the voids shall not exceed 10 times the total area of the hole. The maximum size in the horizontal plane shall not exceed 25% of the hole circumference, and the maximum size inside shall not exceed 25% of the plate thickness. There should be no plating voids at the interface between the hole wall and the conductive pattern or the inner layer of the galvanized hole. The boundary refers to a distance extending from each conductive pattern to the bottom, and its length is 1.5 of the original length of the surface and copper layer, respectively. Times or inner contact copper is about 2 times
As long as the resin drilling does not interrupt the electrical trace, it is allowed to shoot temporary drilling between continuous silver bond layers
The metallized emulsion should have no annular cracks or
annular separation from the hole
The metallized holes with bond layer cavities should not exceed the total number of metallized holes
There should be no cracks or breaks! The reduction of the lead or the blood path between the conductors does not exceed the relevant specifications, such as 20% or
3-head. Voids or edge defects are allowed to exist gradually
In necessary locations
Apply test method 2s-
Through dimensional verification
As long as the reduction of the full electrical path between the conductors does not exceed 20% of the original design or is not less than the circuit voltage! Application test method 28, medical spacing requirements, measurement allows residual particles in the
shape size and deviation should comply with the relevant specifications board thickness should comply with the relevant specifications
total board thickness and deviation should comply with the relevant specifications through size and inspection to prove
total board thickness and deviation
should be in accordance with the
1st revision of IEC321
pretreatment
characteristic test standards
measurement under atmospheric conditions
according to IEC68-
2-3 test Ca:
state damp heat modified IEC
68 2 38, test
2/A1) correction 1 temperature
proof temperature cycle test
, missing! !
Line width
Net line distribution
Irregularity with connection plate
Confirmation of hole center position
Electrical test
Interconnection resistance
Insulation resistance
TEC326-2
Test number
GB/T 4588.4—1996
Table (continued)
Additional
Test details
Comprehensive tests
Ground specimens
Individual comprehensive
Test pattern
Entire comprehensive
Test pattern
Mounting holes and component holes shall conform to the relevant specifications except for the diameter change
Nominal diameter of metallized holes for through connections shall conform to the relevant specifications
Only the following shall conform to the relevant specifications
Conductor width shall conform to the size specified in the relevant specifications
Voids or edge defects are permitted as long as the reduction in conductor width does not exceed that specified in the relevant specifications, such as 20% or 35%. The length L of the defect should not be greater than the wire width S or 5mm, whichever is smaller (see Figure 1). The defect should comply with the size specified in the relevant specifications. The connection plate should not be damaged, and there should be no opening at the connection with the wire. The center position of the hole should be within any deviation range specified in the relevant specifications. The resistance value should comply with the relevant specifications. There should be no short circuit phenomenon. The insulation resistance should comply with The relevant standard TEC:326-3 defines the estimated hole size and the error system. It is not necessary to measure the hole accurately because the error is not important here. If there is no obvious image error, the approximate deviation specified in IEC 326-3 can be used before environmental treatment. , or measure the insulation strength at high temperature. The relevant standards should be followed. This standard should specify the applicable processing conditions. Measure at high temperature. Mechanical test. Dielectric strength. Measure under standard atmospheric conditions. Measure at high temperature. Contact metal development
Warp
Other tests
Wrinkle point adhesion
Strand tape method
Printed contactwwW.bzxz.Net
Solderability
A supply double point at the same time
Inactive
Resistant
Delivery state
That speed aging shop
IEC326
Test 9
CB/T 4588.4-1996
Table I (continued)
Additional
Comprehensive test
Figure and test diagram
The strength of the pull-out strength should comply with the provisions of the relevant specifications. The pull-out strength should not be less than that of the relevant specifications. The curvature radius should not be less than that of the relevant specifications. Relevant specifications: After the tape is pulled off the conductor, there should be no trace of plating sticking to the edge of the protruding part. The thickness should meet the requirements of relevant specifications. The conductor skin should be smooth and bright. The solder coating should be covered with scattered defects such as needles and non-wetting. When testing the finished board, the gold base should not be connected to the inner layer. The defects should not be concentrated in one area. The solderable surface should be wetted inside. When testing the intermittent coating of the test sample, the test should start from the inside. The semi-solderable test should keep in contact with the solvent for 5-6 s. After welding, there should be no semi-wetting phenomenon. The sample should be wetted within 4s. The sample should be in contact with the olefin melt obliquely for 5-6 seconds. After welding, there should be no semi-wetting phenomenon to avoid adverse effects caused by thermal effects. According to IEC: 68 2 24: 6.6-1: The conditions for the use of non-activated flux specified in the relevant specifications are specified in the relevant specifications. B) When activated flux is used between two lines, IEC326-2, test number, acceptance state and accelerated aging, resistance to solvents and solvents, temperature surge treatment: see Section 2, GB/T 4588.4 1996
Wheat (Complete)
Appendix
Test Group Section
Comprehensive Test
Graphical Test
Solderable and semi-solderable holes (if applicable) shall be subjected to the good soldering hole state shown in Figure 3
Board 1. With or with special protective snow
Solderable: The sample shall be moistened within 3 s
Semi-solderable, the test partner shall be connected to the molten solder rack for 6 seconds There should be no semi-wetting phenomenon after the semi-entry and solderable holes (if applicable) should meet the conditions of good solder holes as shown in Figure 3. The following phenomena should not be produced: Blistering or separation; The barrier layer has no visible peeling and degradation + obvious discoloration. Acceptable. a. Marking is particularly damaged: h. Marking is weakened but still recognizable: Marking cannot be recognized or disappears, b. Marking is too sparse, and similar words may fade, such as RPB.EF.CG-- 0
There should be no concentration or stratification
Active adhesive
(3.2%)According to IEC68-
2-20, 5.2.2
The applicable conditions are specified in the relevant specifications
Only when the relevant specifications
are the microscopic
dimension inspection
Medical shape and hole relative to the ten cases
Special steam level declaration
Electrical test
Resistance of metallized hole
Withstand current
Conductor commercial current
Withstand voltage
Peak rate source shift
Place: [E:68-
2-3 Test Ca: Transient damp heat test Other tests Coating adhesion Temperature of coating (non-contact) Gas exposure test Electromagnetic imaging method Coating hysteresis (non-contact) * See Chapter 2 6 Capability test plan IEC: $26-2
Test number
3 in JEC326-2
:
GB/T4588.4-1996
Additional performance (only for evaluation when specifically required) Table 1
Related specifications
Yes
Additional
Test details
Comprehensive test
Graphic selection
Position should comply with the provisions of the relevant specifications.
Electrical sub-polishing should comply with the provisions of the relevant specifications. The determination shall comply with the provisions of the relevant specifications. At least 5 holes shall be tested. When the plating in the hole is subjected to the appropriate current as specified in TEC326-2, the formation (degradation) and overheating are usually not measured. The roundness is the important performance factor. The relationship between the shape and the hole, which controls the width between the connecting plate and the diameter, is adopted when the special requirements are met. JHS:326-3 The specified color change should not be caused by heat. There should be no color change due to heat. There should be no spark effect. The frequency drift should not exceed the limit specified in the relevant specifications. The coating should not have any signs of pooling or falling off. It should comply with the relevant specifications. It should comply with the relevant specifications. The performance and requirements for basic capability to be tested are shown in Table 1 and Table II of Chapter 5. The additional capability should be in accordance with the provisions of 3.5.3 of IEC/PQC88. The multiple splicing of the specimen and test pattern of the comprehensive test pattern (CTP) is shown in Figure 2 and Figure 8, and the capability test plan is shown in Table I. Visual inspection
Consistency
Additional measurement
Metalized lead
Find the wire age
Wire strength
Dimensional inspection
Find the size
Printed plug part
Wire width
Wire width
Non-coaxiality between hole and pad
Electrical test
Resistance change of metalized hole
Electrical change of connection
Insulation resistance
After the pot test|| tt||Insulation resistance
Insulation resistance
Inner layer resistance
Mechanical test
Peeling strength
Pull-out strength
Metal connection plate plated hole
Other tests
Contact area plating adhesion
Contact area layer strength
Non-contact area strength
Including microscopy (if applicable)
Solderability
Accepted state, 0.2 final active agent
GB/T 4588.4 1996
Test good
Allow this
Qualified number
Basic ability test
Test figure and number sheet
Average board
9 complete CTP
Before cutting board
"Test K
9 samples A
9 test F
9 test A
6· 1 sample door
6 samples L
3 mouse bullets E
3 trials
3 test banks M
6 test mixes C (lower part)
3 samples
3 ends B
3 samples K
3 trials
3 test C (part)
3 test halves C (upper part)
9 samples H||t t||9 test A
Additional capacity
Specimen H
9 test A
Assembly state
Non-corrosive flux
After accelerated treatment
Non-coal-sticking agent||tt ||Rapid aging
0.2% active azole agent
GB/T458B.4—1996
Table (complete)
Note: The total number of non-compliance allowed for all tests is 37 Quality consistency inspection
Number of non-compliance allowed
Number of test subjects for basic capability test
Number of test subjects for quality consistency inspection The performance and requirements of quality consistency inspection are shown in Table 1 and Table I of Chapter 5. The inspection grouping is shown in 4.3
Description of additional capability
1 test piece H
9 test pieces A
9 standard samples H
1 test piece A
For the composition of the inspection lot of printed boards, see 4.1 of IEC/PQC88. For inspection lots of small quantities and/or expensive printed boards, see 4.2 of IEC/PQC88.
For the evaluation capability level, see the table.
Formation of assessment level R (any intermediate level between level A and level C) see 5.2.5 of IEC/PQC88. A higher assessment level D can be formed by using assessment level C and specified additional test agents and/or more stringent IL./AQI, see 5.2.5 of IEC/PQC88.
Assessment level
Conformity
Quality
Porosity
Wire embedment
Wire residue
Test number
Level A
Level B
According to 5.2.5 of IEC/PQC88.
Water content C
Formed as compared to 5.2.5 of IEC/PQC88.
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