title>GB/T 11497.1-1989 Semiconductor integrated circuits CMOS circuit series and varieties 54/74HC series varieties - GB/T 11497.1-1989 - Chinese standardNet - bzxz.net
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GB/T 11497.1-1989 Semiconductor integrated circuits CMOS circuit series and varieties 54/74HC series varieties

Basic Information

Standard ID: GB/T 11497.1-1989

Standard Name: Semiconductor integrated circuits CMOS circuit series and varieties 54/74HC series varieties

Chinese Name: 半导体集成电路CMOS电路系列和品种 54/74HC系列的品种

Standard category:National Standard (GB)

state:Abolished

Date of Release1989-03-18

Date of Implementation:1990-04-01

Date of Expiration:2005-10-14

standard classification number

Standard ICS number:Electronics>>31.200 Integrated Circuits, Microelectronics

Standard Classification Number:Electronic Components and Information Technology>>Microcircuits>>L56 Semiconductor Integrated Circuits

associated standards

Publication information

other information

Review date:2004-10-14

Drafting unit:Factory 878 of the Ministry of Mechanical and Electrical Engineering

Focal point unit:National Semiconductor Device Standardization Technical Committee

Publishing department:Ministry of Information Industry (Electronics)

competent authority:Ministry of Information Industry (Electronics)

Introduction to standards:

GB/T 11497.1-1989 Semiconductor integrated circuits CMOS circuit series and varieties 54/74HC series varieties GB/T11497.1-1989 standard download decompression password: www.bzxz.net

Some standard content:

Guohao Standard of the People's Republic of China
Series and products for CMos semiconductor futegrated circuitsProducts of serles 54/74HC
GB11497.1---89
This standard specifies the logic functions, external lead arrangement and main electrical parameters of the varieties of semiconductor integrated circuit CMOS circuits 54/74HC series (hereinafter referred to as devices). The quality assessment of devices shall comply with the provisions of the relevant detailed specifications of the devices. When producing (developing) or selecting devices, their series and varieties shall comply with the provisions of this standard. Unless otherwise specified, the logic involved in this standard is positive logic. 1 Symbol code
1.1 The logic graphic symbols used in this standard comply with the provisions of GB4728.12 Graphic symbols for electrical diagrams Binary logic units. The symbols used in this standard comply with the provisions of GB3431.1 "Semiconductor integrated circuit symbols, electrical parameter symbols" and GB3431.2 Semiconductor integrated circuit symbols, terminal function symbols". 1.2 The device types and series codes listed in this standard are the 0th, 1st and 2nd parts of the device models specified in GB3430 "Semiconductor integrated circuit model naming method".
Approved by the Ministry of Machinery and Electronics Industry of the People's Republic of China on March 1, 1989 and implemented on April 1, 1990
2 Varieties
Gate circuits, inverters
Large inverters
Quad 2-input NAND gates
Triple 8-input NAND gates
Dual 4-input NAND gates
8-input NAND gates
13-input NAND gates
Quad 2 Input NAND gate (open drain)
Six inverting ilium (with Schmitt trigger)
Quad 2-input NAND gate (with Schmitt trigger)Quad 2-input NOR gate
Triple 3-input NOR gate
Dual 4-input NOR gate
8-input NOR/OR gate
Quad 2-input AND gate
3-input AND gate
Quad 2-input OR gate
Triple 3-input OR gate
2-way 3-3 input, 2-way 2-2 Input and/or gate buffer, topic drive
Six buffers/level converters
Six inverting buffers/level converters
Four bus buffers (3S)
Four bus buffers (3S.EN high level valid) Four bidirectional bus transmitters/receivers (3S)
Four bidirectional inverting bus transmitters/receivers (3S) Six bus drivers (3§, common control) Six inverting bus drivers (3S, common control) Six bus drivers (35. Two groups of control)
Six inverting bus drivers (3S, two groups of control) Eight inverting buffers/line drivers (3S. Two groups of control) Eight inverting buffers/line drivers (3S, two groups of control) Eight buffers/line drivers (3S, two groups of control) GB 11497. 1—89
Type, series and variety code
CC54HC04/CC74HC04bzxz.net
CC54HC00/CC74HC00
CC54HC10/CC74HC10
CC54HC20/CC74HC20
CC54HC30/CC74HC30
CC54HC133/CC74HC133
CC54HC03/CC74HC03
CG54HC14/CC74HC14
CC54HC132/ CC74HC132
CC54HC02/CC74HC02
CC54HC27/CC74HC27
CC54HC4002/CC74HC4002
CC54HC4078/CC74HC4078| |tt||CC54HC08/CC74HC08
CC54HC11/CC74HC11
CC54HC32/CC74HC32
CC54HC4075/CC74HC4075
CC54HC51/C C74HC51
CC54HC4050/CC74HC4050
CC54HC4049/CC74HC4049
CC54HC125/CC74HC125
CC54HC126/CC74HC12 6
CC54HC243/CC74HC243
CC54HC242/CC74HC242
CC54HC365/CC74HC365
CC54HC366/CC74HC366
CC54 HC367/CC74HC367
CC54HC368/CC74HC368
CC54HC240/CC74HC240
CC54HC241/CC74HC241
CC54HC244/CC74HC244
Eight bidirectional bus transmitter/receiver (3S) name
Eight bidirectional inverting bus transmitter/receiver (3S) Eight dual-phase bus receiver transmitter/register (3S) Eight bidirectional friendly bus receiver transmitter/register (3S) trigger, pin register
Double falling edge J--K Trigger (with preset and clear terminals) Dual JK Trigger (with clear terminals)
Dual rising edge J--K Trigger (with preset and clear terminals) Dual rising edge D Trigger (with preset and clear terminals) Four rising edge D Trigger (with common clear terminal) GB 11497. 1-89
Six 1. Rising edge 1) Trigger (Q terminal output, with common clear terminal) Eight rising edge D Trigger (3S)
Eight rising edge D Trigger (3S can increase output) 8-bit addressable latch
Eight D latch: S>
D latch (3S, port output)
Dual monostable trigger (with period trigger) Dual retriggerable monostable trigger (with clear terminal: Dual retriggerable monostable trigger [with clear terminal] Arithmetic unit
4 4-bit 2-bit carry-lookahead full adder
4-bit arithmetic logic unit/function generator (32 functions)Carry-lookahead generator
4-bit numerical comparator
9-bit odd/false generator/checker
4-bit 2-input XOR gate
4-bit 2-input XOR gate
8-bit identical comparator (low voltage output valid)Registers and shift registers
4-bit dual shift odd register (parallel storage)4-bit shift register (parallel access, JK input)8-bit shift register (serial input, parallel output)8-bit shift register (parallel input,Complementary serial output) 8-bit shift register (serial, parallel input, serial output) type, series variety code
CC54HC245/CC74HC245
CC54HC640/CC74HC640
CC54HC646/CC74HIC646
CC54HC64B/CC74HC648
CC54HC112/74HC112
CC54HC107/CC74HC10?
CC54HC109/CC74HC10 4HC109
CC54HC74/CC74HC74
CC54HC175/CC74HC175
CC54HC174/CC74HC174
CC54HC374/CC74HC3 74
CC54HC534/CC74HC534
CC54HC259/CC74HC259
CC54HC373/CC74HC373
CC54HC533/CC74HC533
CC54HC221/CC74HC221
CC54HC123/CC74HC123
CC54HC4538/CC74HC4538
CC54HC283/CC74HC283
CC54HC181/CC74FIC181
CC54HC182/CC74HC:182
CC54HC85/CC74HC85
CC54HC280/CC74HC280|| tt||CC54HC86/CC74HC86
CC54HC266/CC74HC266
CC54HC688/CC74HC688
CC54HC194/C:74HC194
CC54HC195/CC74HC195
CC54HC164/CC74HC164
CC54HC165/CC74HC165
CC54HC166/CC:74HC166
GB 11497. 1--- 89
Device Name
8-bit shift register (3S, latch input, serial and parallel input, serial output)8-bit shift register (3S, latch output, serial input, serial and parallel output)8-bit shift register (latch input, serial and parallel input, serial output)8-bit bidirectional shift/storage register (3S)
4-bit L odd register (35, Q odd output)
Priority encoder
10-line-4-line priority encoder (BCD output)Data selector
8-to-1 data selector (35, complementary output)8-to-1 data selector (with select input, five-complement output)Dual 4-to-1 data selector (3S)
Dual 4-to-1 data selector (with select input)-4-bit 2-to-1 data selector (register output)8 Select 1 data selector (data address storage, 3S, complementary output) 8 select 1 data selector (data address latch, 3S, complementary output) 4 select 2 select 1 data selector (3S) || tt || 4 select 2 select 1 data selector (with common strobe input, inverted output) 4 select 2 select 1 data selector (with common strobe input) Decoder || tt || 4-line to 10-line decoder (BCD input) || tt || 3-line to 8-line decoder || tt || Dual 2-line to 4-line decoder || tt || 4-line to 16-line decoder || tt || 4-line to 16-line decoder (latch input) || tt || 4-line seven-segment latch decoder/driver (BCD input) 4 7-segment decoder (BCD input, micro memory input, drive liquid display) counter
double 2-1-5-1 decimal counter (asynchronous clear) double 4-bit binary counter (asynchronous clear) decimal synchronous counter (synchronous clear)
decimal synchronous counter (asynchronous clear)
decimal step add/subtract counter (effective clock) decimal synchronous add/subtract counter
4-bit binary synchronous counter (step clear) type, series variety code
CC54HC589/CC74HC589
GC54HC595/CC74HC595
CC54HC597/C C74HC597
CC54HC299/CC74HC299
CC54HC173/LX74HC173
CC54HC147/CC74HC147
CC54HC251/CC74HC251
CC 54HC151/CC74HC151
CC54HC253/CC74HC253
CC54HC153/CC74HC153
CC54HC29R/CC74HC298
CC54HC354/CC74HC35 4
CC54HC356/CC74HC356
CC54HC257/CC74HC257
CC54HC168/CC74HC158
CC54HC157/CC74HC157
CC54HC42 /CC74HC42
CC54HC138/CC74HC138
CC54HC139/CC74HC139
CC54HC154/CC74HC154
CC54HG4514/CC74HC4514||tt| |CC54HC4511/CC74HC4511
CC54HC4543/CC74HC4543
CC54HC390/CC74HC390
CC54HC393/CC74HC393
CC54HC162/C C74HC162
CC54HC160/CC74HC160
CC54HC192/CC74HC192
CC54HC190/CC74HC190
CC54HC163/CC74HC163
GB 11497. 1 --89
Device Name
4 Low Binary Synchronous Counter (Asynchronous Clear) 4-bit Binary Synchronous Up/Down Counter (Dual Clock) 4-bit Binary Synchronous Up/Down Counter
Decade Counter/Pulse Distributor
12-bit Binary Serial Counter
14-bit Binary Intermediate Counter
14 1-bit avoidance counter
Analog switch
4-way switch
4-way switch
8-way analog switch
Dual 4-to-1 analog switch
3-to-1 analog switch
CC54HC04/CC74HC04
2.1. Six inverters
Inverter symbol
4A_290
Logical expression
Main electrical parameters (typical values)
tr=8ns
(2)1
2.2 4 2 Input and NAND gate
Lead out cap row
Ct=15pF)
CC54HC00/CC74HC00
Type, series code
CC54HC161/CC74HC161
CC54HC193/CC74HC193
CC54HC191/CC74HC191
CC54HC4017/CC74HC4017
CC54HC4024/CC74HC4024
CC54HC4040/CC74HC4040
CC54HC40 60/CC74HC4060
CC54HC4016/CC74HC4016
CC54HC4066/CC74HC4066
CC54HC4051/CC74HC4051
CC54HC4052/CC74HC4052
CC54HC4053/CC74HC4053
Logic structure diagram
Logic expression
YA·B
Editing symbol
Main electrical parameters (typical values)
fad=8ns
(V=6V)
GB 11497. 1-89
Pin arrangement
Ct=15pF)
2.3 Three 3-input NAND gate CC54HC10/CC74HC10 logic number
Logic expression
Main electrical parameters (typical)
Ig≤2μA
(8)3Y
(V=6V)
Pin arrangement
Ci=15pF)||tt ||2.4 Dual 4-input NAND gate CC54HC20/CC74HC20Wbreo
Logical structure diagram
Ningkong Ningzhong
Logical structure diagram
28610)
Logical expression
Logical symbol
Main electrical parameters (typical values)
tr=8ns
(6)
(Ve-5V,
GB 11497.1 -89
Pin arrangement
CL15pF)
2.5 8-input NAND gate CC54HC30/CC74HC30 logic symbol
Logic expression
Pin arrangement
YA.BCDEFGH
Main electrical parameters (typical values)
t——20ns
(Ve-5V,
Cr=15pF)
2.613-input NAND gate CC54HC133/CC74HC1334bvac
Logic structure diagram
Logic structure diagram
(15)
Logic expression
Logic symbol
GB 11497. 1B9
Lead terminal arrangement
YA.BCDEFGHII-KL-M
Main electrical parameters (typical values)
tpd=20ns
(V.=6V)
CL=15F)
2.7 Four 2-input NAND gate 6 open drain) CC54HC03/CC74HC03 logic symbol
44(12)
Logic expression
YA·B
Main electrical parameters (typical values)
tpa-10ns
Tes2uA
(8)Y
Lead terminal arrangement
Ch=15pF )
Logic structure diagram
Electrical schematic diagram
2.8 Six inverters (with Schmitt trigger) CC54HC14/CC74HC141A
6A(13)
Logic expression
Edit symbol
Main electrical parameters (typical values)
ta=12ns
(0)6Y
(Ve-5V,
(V=6V)
GB 11497.1—89
Lead-out arrangement
[Big meat
Ct=15pF)
2.9 Quad 2-input NAND gate (with Schmitt trigger) CC54HC132/CC74HC132
Logic symbol
3B-5101
Logic expression
Main electrical parameters (typical values)
tpd=12ns
Lead-out period arrangement
(Vα-5V,
C,=15pF)
Electrical diagram (1/6)
Logic diagram
GB 11497.1—89
2.10 Quad 2-input dual NOT gate CC54HC02/CC74HC02 logic symbol
(9)
18(12)
Logical expression
Main electrical parameters (typical values)
Pin arrangement
'CL-15pF)
2. 11 Triple 3-input NOR gate CC54HC27/CC74HC27 logic symbol
18 (2)
1e(13)
38(19
Logical expression
Y-A+B+C
Main electrical parameters (typical values)
Lead exhaust arrangement
Ct=15pF)
High point product
2.12 Dual 4-input NOT gate CC54HC4002/CC74HC400 2Logic structure diagram
Comply with logic structure diagram
18-(3)
2810)
Logic expression
Logic symbol
Y=A+B+C+I
Main electrical parameters (typical values)
tya-llns
(Va=5V,
(V=6V)
GE 11497.1—89
Pin arrangement
Ct=15pF)
2.138 Input NOT/OR gate CC54HC4078/CC74HC4078 logic symbol
B (3)
Logical expression
Pin arrangement
YA+B+C+D+E+F+G+H
Main electrical parameters (typical values)
tpa-14ns
(V..--5V.
(Vw=6V)
CL=15pF)
2. 14 Four 2-input AND gates CC54HC08/CC74HC08IB
Logical structure diagram
Logical structure diagram
Logical expression
(2)
Main electrical parameters (typical values)
tnet=10ns
Comply with symbols
(Va=6V)
GB 11497.1—89
Pin arrangement
CL=15pF)
2. 15 3 3-input AND gate CC54HC11/CC74HC11 logic symbol
(13)
2A_(3)
28(4)
20(5)
38_510)
Logic expression
Main electrical parameters (typical values)
t-12ns
Pin arrangement
CL-15pF)
2.16 4 2-input OR gate CC54HC32/CC74HC3214b
Inverse structure diagram
Logic structure diagram3 Three 3-input NAND gate CC54HC10/CC74HC10 logic symbol
Logic expression
Main electrical parameters (typical)
Ig≤2μA
(8)3Y
(V=6V)
Lead arrangement
Ci=15pF)
2.4 Dual 4-input NAND gate CC54HC20/CC74HC20Wbreo
Logic structure diagram
Ningkong Ningzhong
Logic structure diagram
28610)
Logic expression
Logic symbol
Main electrical parameters (typical value)
tr=8ns
(6)
(Ve-5V,
GB 11497.1 -89
Pin arrangement
CL15pF)
2.5 8-input NAND gate CC54HC30/CC74HC30 logic symbol
Logic expression
Pin arrangement
YA.BCDEFGH
Main electrical parameters (typical values)
t——20ns
(Ve-5V,
Cr=15pF)
2.613-input NAND gate CC54HC133/CC74HC1334bvac
Logic structure diagram
Logic structure diagram
(15)
Logic expression
Logic symbol
GB 11497. 1B9
Pin arrangement
YA.BCDEFGHII-KL-M
Main electrical parameters (typical values)
tpd=20ns
(V.=6V)
CL=15F)
2.7 Four 2-input NAND gate 6 open drain) CC54HC03/CC74HC03 logic symbol
44(12)
Logic expression
YA·B
Main electrical parameters (typical values)
tpa-10ns
Te s2uA
(8)Y
Lead exhaust arrangement
Ch=15pF)
Logic structure diagram
Electrical schematic diagram
2.8 Six inverters (with Schmitt trigger) CC54HC14/CC74HC141A
6A(13)
Logic expression
Edit symbol
Main electrical parameters (typical values)
ta=12ns
(0)6Y
(Ve-5V,
(V=6V)
GB 11497.1—89
Lead-out arrangement
[Big meat
Ct=15pF)
2.9 Quad 2-input NAND gate (with Schmitt trigger) CC54HC132/CC74HC132
Logic symbol
3B-5101
Logic expression
Main electrical parameters (typical values)
tpd=12ns
Lead-out period arrangement
(Vα-5V,
C,=15pF)
Electrical diagram (1/6)
Logic diagram
GB 11497.1—89
2.10 Quad 2-input dual NOT gate CC54HC02/CC74HC02 logic symbol
(9)
18(12)
Logical expression
Main electrical parameters (typical values)
Pin arrangement
'CL-15pF)
2. 11 Triple 3-input NOR gate CC54HC27/CC74HC27 logic symbol
18 (2)
1e(13)
38(19
Logical expression
Y-A+B+C
Main electrical parameters (typical values)
Lead exhaust arrangement
Ct=15pF)
High point product
2.12 Dual 4-input NOT gate CC54HC4002/CC74HC400 2Logic structure diagram
Comply with logic structure diagram
18-(3)
2810)
Logic expression
Logic symbol
Y=A+B+C+I
Main electrical parameters (typical values)
tya-llns
(Va=5V,
(V=6V)
GE 11497.1—89
Pin arrangement
Ct=15pF)
2.138 Input NOT/OR gate CC54HC4078/CC74HC4078 logic symbol
B (3)
Logical expression
Pin arrangement
YA+B+C+D+E+F+G+H
Main electrical parameters (typical values)
tpa-14ns
(V..--5V.
(Vw=6V)
CL=15pF)
2. 14 Four 2-input AND gates CC54HC08/CC74HC08IB
Logical structure diagram
Logical structure diagram
Logical expression
(2)
Main electrical parameters (typical values)
tnet=10ns
Comply with symbols
(Va=6V)
GB 11497.1—89
Pin arrangement
CL=15pF)
2. 15 3 3-input AND gate CC54HC11/CC74HC11 logic symbol
(13)
2A_(3)
28(4)
20(5)
38_510)
Logic expression
Main electrical parameters (typical values)
t-12ns
Pin arrangement
CL-15pF)
2.16 4 2-input OR gate CC54HC32/CC74HC3214b
Inverse structure diagram
Logic structure diagram3 Three 3-input NAND gate CC54HC10/CC74HC10 logic symbol
Logic expression
Main electrical parameters (typical)
Ig≤2μA
(8)3Y
(V=6V)
Lead arrangement
Ci=15pF)
2.4 Dual 4-input NAND gate CC54HC20/CC74HC20Wbreo
Logic structure diagram
Ningkong Ningzhong
Logic structure diagram
28610)
Logic expression
Logic symbol
Main electrical parameters (typical value)
tr=8ns
(6)
(Ve-5V,
GB 11497.1 -89
Pin arrangement
CL15pF)
2.5 8-input NAND gate CC54HC30/CC74HC30 logic symbol
Logic expression
Pin arrangement
YA.BCDEFGH
Main electrical parameters (typical values)
t——20ns
(Ve-5V,
Cr=15pF)
2.613-input NAND gate CC54HC133/CC74HC1334bvac
Logic structure diagram
Logic structure diagram
(15)
Logic expression
Logic symbol
GB 11497. 1B9
Pin arrangement
YA.BCDEFGHII-KL-M
Main electrical parameters (typical values)
tpd=20ns
(V.=6V)
CL=15F)
2.7 Four 2-input NAND gate 6 open drain) CC54HC03/CC74HC03 logic symbol
44(12)
Logic expression
YA·B
Main electrical parameters (typical values)
tpa-10ns
Te s2uA
(8)Y
Lead exhaust arrangement
Ch=15pF)
Logic structure diagram
Electrical schematic diagram
2.8 Six inverters (with Schmitt trigger) CC54HC14/CC74HC141A
6A(13)
Logic expression
Edit symbol
Main electrical parameters (typical values)
ta=12ns
(0)6Y
(Ve-5V,
(V=6V)
GB 11497.1—89
Lead-out arrangement
[Big meat
Ct=15pF)
2.9 Quad 2-input NAND gate (with Schmitt trigger) CC54HC132/CC74HC132
Logic symbol
3B-5101
Logic expression
Main electrical parameters (typical values)
tpd=12ns
Lead-out period arrangement
(Vα-5V,
C,=15pF)
Electrical diagram (1/6)
Logic diagram
GB 11497.1—89
2.10 Quad 2-input dual NOT gate CC54HC02/CC74HC02 logic symbol
(9)
18(12)
Logical expression
Main electrical parameters (typical values)
Pin arrangement
'CL-15pF)
2. 11 Triple 3-input NOR gate CC54HC27/CC74HC27 logic symbol
18 (2)
1e(13)
38(19
Logical expression
Y-A+B+C
Main electrical parameters (typical values)
Lead exhaust arrangement
Ct=15pF)
High point product
2.12 Dual 4-input NOT gate CC54HC4002/CC74HC400 2Logic structure diagram
Comply with logic structure diagram
18-(3)
2810)
Logic expression
Logic symbol
Y=A+B+C+I
Main electrical parameters (typical values)
tya-llns
(Va=5V,
(V=6V)
GE 11497.1—89
Pin arrangement
Ct=15pF)
2.138 Input NOT/OR gate CC54HC4078/CC74HC4078 logic symbol
B (3)
Logical expression
Pin arrangement
YA+B+C+D+E+F+G+H
Main electrical parameters (typical values)
tpa-14ns
(V..--5V.
(Vw=6V)
CL=15pF)
2. 14 Four 2-input AND gates CC54HC08/CC74HC08IB
Logical structure diagram
Logical structure diagram
Logical expression
(2)
Main electrical parameters (typical values)
tnet=10ns
Comply with symbols
(Va=6V)
GB 11497.1—89
Pin arrangement
CL=15pF)
2. 15 3 3-input AND gate CC54HC11/CC74HC11 operation symbol
(13)
2A_(3)
28(4)
20(5)
38_510)
Logical expression
Main electrical parameters (typical values)
t-12ns
Pin arrangement
CL-15pF)
2.16 4 2-input OR gate CC54HC32/CC74HC3214b
Inverse structure diagram
Logical structure diagram7 4 2-input NAND gate 6 open drain) CC54HC03/CC74HC03 logic symbol
44(12)
Logic expression
YA·B
Main electrical parameters (typical values)
tpa-10ns
Tes2uA
(8)Y
Lead exhaust arrangement
Ch=15pF)
Logic structure diagram| |tt||Electrical schematic
2.8 Six inverters (with Schmitt trigger) CC54HC14/CC74HC141A
6A(13)
Logical expression
Editor symbol
Main electrical parameters (typical values)
ta=12ns
(0)6Y
(Ve-5V,
(V=6V)
GB 11497.1—89
Lead-out arrangement
[Big meat
Ct=15pF)
2.9 Quad 2-input NAND gate (with Schmitt trigger) CC54HC132/CC74HC132
Logic symbol
3B-5101
Logic expression
Main electrical parameters (typical values)
tpd=12ns
Lead-out period arrangement
(Vα-5V,
C,=15pF)
Electrical diagram (1/6)
Logic diagram
GB 11497.1—89
2.10 Quad 2-input dual NOT gate CC54HC02/CC74HC02 logic symbol
(9)
18(12)
Logical expression
Main electrical parameters (typical values)
Pin arrangement
'CL-15pF)
2. 11 Triple 3-input NOR gate CC54HC27/CC74HC27 logic symbol
18 (2)
1e(13)
38(19
Logical expression
Y-A+B+C
Main electrical parameters (typical values)
Lead exhaust arrangement
Ct=15pF)
High point product
2.12 Dual 4-input NOT gate CC54HC4002/CC74HC400 2Logic structure diagram
Comply with logic structure diagram
18-(3)
2810)
Logic expression
Logic symbol
Y=A+B+C+I
Main electrical parameters (typical values)
tya-llns
(Va=5V,
(V=6V)
GE 11497.1—89
Pin arrangement
Ct=15pF)
2.138 Input NOT/OR gate CC54HC4078/CC74HC4078 logic symbol
B (3)
Logical expression
Pin arrangement
YA+B+C+D+E+F+G+H
Main electrical parameters (typical values)
tpa-14ns
(V..--5V.
(Vw=6V)
CL=15pF)
2. 14 Four 2-input AND gates CC54HC08/CC74HC08IB
Logical structure diagram
Logical structure diagram
Logical expression
(2)
Main electrical parameters (typical values)
tnet=10ns
Comply with symbols
(Va=6V)
GB 11497.1—89
Pin arrangement
CL=15pF)
2. 15 3 3-input AND gate CC54HC11/CC74HC11 operation symbol
(13)
2A_(3)
28(4)
20(5)
38_510)
Logical expression
Main electrical parameters (typical values)
t-12ns
Pin arrangement
CL-15pF)
2.16 4 2-input OR gate CC54HC32/CC74HC3214b
Inverse structure diagram
Logical structure diagram7 4 2-input NAND gate 6 open drain) CC54HC03/CC74HC03 logic symbol
44(12)
Logic expression
YA·B
Main electrical parameters (typical values)
tpa-10ns
Tes2uA
(8)Y
Lead exhaust arrangement
Ch=15pF)
Logic structure diagram| |tt||Electrical schematic
2.8 Six inverters (with Schmitt trigger) CC54HC14/CC74HC141A
6A(13)
Logical expression
Editor symbol
Main electrical parameters (typical values)
ta=12ns
(0)6Y
(Ve-5V,
(V=6V)
GB 11497.1—89
Lead-out arrangement
[Big meat
Ct=15pF)
2.9 Quad 2-input NAND gate (with Schmitt trigger) CC54HC132/CC74HC132
Logic symbol
3B-5101
Logic expression
Main electrical parameters (typical values)
tpd=12ns
Lead-out period arrangement
(Vα-5V,
C,=15pF)
Electrical diagram (1/6)
Logic diagram
GB 11497.1—89
2.10 Quad 2-input dual NOT gate CC54HC02/CC74HC02 logic symbol
(9)
18(12)
Logical expression
Main electrical parameters (typical values)
Pin arrangement
'CL-15pF)
2. 11 Triple 3-input NOR gate CC54HC27/CC74HC27 logic symbol
18 (2)
1e(13)
38(19
Logical expression
Y-A+B+C
Main electrical parameters (typical values)
Lead exhaust arrangement
Ct=15pF)
High point product
2.12 Dual 4-input NOT gate CC54HC4002/CC74HC400 2Logic structure diagram
Comply with logic structure diagram
18-(3)
2810)
Logic expression
Logic symbol
Y=A+B+C+I
Main electrical parameters (typical values)
tya-llns
(Va=5V,
(V=6V)
GE 11497.1—89
Pin arrangement
Ct=15pF)
2.138 Input NOT/OR gate CC54HC4078/CC74HC4078 logic symbol
B (3)
Logical expression
Pin arrangement
YA+B+C+D+E+F+G+H
Main electrical parameters (typical values)
tpa-14ns
(V..--5V.
(Vw=6V)
CL=15pF)
2. 14 Four 2-input AND gates CC54HC08/CC74HC08IB
Logical structure diagram
Logical structure diagram
Logical expression
(2)
Main electrical parameters (typical values)
tnet=10ns
Comply with symbols
(Va=6V)
GB 11497.1—89
Pin arrangement
CL=15pF)
2. 15 3 3-input AND gate CC54HC11/CC74HC11 logic symbol
(13)
2A_(3)
28(4)
20(5)
38_510)
Logic expression
Main electrical parameters (typical values)
t-12ns
Pin arrangement
CL-15pF)
2.16 4 2-input OR gate CC54HC32/CC74HC3214b
Inverse structure diagram
Logic structure diagram15 Three 3-input AND gate CC54HC11/CC74HC11 logic symbol
(13)
2A_(3)
28(4)
20(5)
38_510)
Logic expression
Main electrical parameters (typical values)
t-12ns
Pin arrangement
CL-15pF)
2.16 Four 2-input OR gate CC54HC32/CC74HC3214b
Inverse structure diagram
Logic structure diagram15 Three 3-input AND gate CC54HC11/CC74HC11 logic symbol
(13)
2A_(3)
28(4)
20(5)
38_510)
Logic expression
Main electrical parameters (typical values)
t-12ns
Pin arrangement
CL-15pF)
2.16 Four 2-input OR gate CC54HC32/CC74HC3214b
Inverse structure diagram
Logic structure diagram
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