SJ 20159-1992 Semiconductor integrated circuit JT54LS155 and JT54LS156 LS-TTL decoder detailed specification SJ20159-1992 standard download decompression password: www.bzxz.net

Military standard for the electronics industry of the People's Republic of China FL5962
Semiconductor integrated circuits
SJ20159—92
Detail specification for types JT54LS155 and JT54LS156DECODERS of LS-TTL semiconductor integrated eircuitsPublished on November 19, 1992
Implemented on May 1, 1993
Published by the Ministry of Machinery and Electronics Industry of the People's Republic of China 1 Scope
1. Subject content
1.2 Scope of application
1.3 Classification
2 Reference documents..
3.1 Detailed requirements
3.2 Design, structure and dimensions
3.3 Lead materials and coatings
3.4 ​​Electrical characteristics
3.5 Test requirements·
3.6 Marking
3.7 Division of microcircuit groups
4 Quality assurance provisions
4.1 Sampling and inspection
4.2 Screening·
4.3 Identification inspection
4.4 Quality consistency inspection·
4.5 Inspection methods
5 Delivery preparation·
5. Packaging requirements．
Notes
6.1 Order information
6.2 Ordering information
6.3 Abbreviations, symbols and definitions
6.4 Substitution
(23)
(23)
(24)
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People's Republic of China Electronic Industry Military Standard Semiconductor Integrated Circuits
Type JT54LS155 and J'T54LS156
Detail specificatlon for types JT54LS155 and J'T54LS156DECODERS of LS-TTL seniconductor integrated circults1 Scope
1.1 Subject matter
SJ 20159—92
This specification specifies the detailed requirements for semiconductor integrated circuits [T54LS155 and JT54LS156 dual 2-wire to 4-wire decoders (hereinafter referred to as devices).
1.2 Scope of application
This specification applies to the development, production and procurement of devices. 1.3 Classification
The devices in this specification are classified according to device model, device level, package type, rated value and recommended operating conditions. 1.3.1 Device number
The device number shall comply with the provisions of Article 3.6.2 of GJB597 "General Specification for Microcircuits". 1.3.1.1 Device model
The device models are as follows:
Device model
JT54LS155
JT54LS156
1.3.1.2 Device level
Device name
Dual 2-wire-1-wire decoder (totem pole input) Dual 2-wire-4-wire decoder (0 output)
The device level shall comply with Article 3.6.2 of GB 597. 4 and B, Grade specified in this specification. 1.3.1.3 Package form
The package form is as follows:
Approved by the Ministry of Machinery and Electronics Industry of the People's Republic of China on November 19, 1992 and implemented on May 1, 1993
1.3.2 Absolute maximum ratings
The absolute maximum ratings are as follows:
Power supply voltage
Input voltage
Storage temperature
Power consumption 1)
Lead soldering resistance (10 s)
Junction temperature 21
SJ 2015992
Package type (GB7092 "Semiconductor integrated circuit dimensions") C2OP3 (ceramic leadless chip carrier package) D16S3 (ceramic dual-row package)
F16X2 (ceramic flat package)
HI6X2 (ceramic seal flat package)
J16S3 (ceramic seal dual-row package)
Note: 1) The device should be able to withstand the increased power consumption when the output short-circuit current (1g) is tested. 2) In addition to the aging test in Article 4.3 of this specification, The junction temperature should not exceed 175°C. 1.3.3 Recommended Operating Conditions
The recommended operating conditions are as follows;
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Power supply voltage
Input high half voltage
Input low level voltage
Output high level current (JT54LS155)
Input cut-off voltage (JT54LS156)
Input low level current
Operating ambient temperature
2 References
SJ 20159—92
GB3431.1-82 Semiconductor integrated circuit text symbols Electrical parameter text symbols GB3431.2-86 Semiconductor integrated circuit text symbols Terminal function symbols GB3439-82 Basic principles of semiconductor integrated circuit TTL circuit test methods GB4590-84 Mechanical and climatic test methods for semiconductor integrated circuits GB4728.12-85 Graphic symbols for electrical diagrams Binary logic unit CB7092 Dimensions of semiconductor integrated circuits GJB548-88 Test methods and procedures for microelectronic devices GJB597-88 General specifications for microcircuits
GJB/Z105 Electronic product anti-static discharge control manual purchase 3 Requirements
3.1 Detailed specifications
All requirements shall be in accordance with the provisions of GJB597 and this specification. 3.2 Design, structure and dimensions
The design, structure and dimensions shall be in accordance with the provisions of GJB 597 and this specification. 3.2.1 Logic symbols, logic diagrams and pin arrangement The logic symbols, logic diagrams and pin arrangement shall comply with the provisions of Figure 1. The pin arrangement is a top view. 3-
JT54LS155
Logic symbols
Logic diagram
(2)1ST
1)IST,
SJ 20159—92
D, F, H, J type
15h2s yuan
12b 2Y,
Pin arrangement
17 A.
910111213
15) A -
(15) 29T. -
(14)2ST,
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JT54L.S156
Logic symbol
1o6（61
Logic diagram
SJ 2015992
D, F, IH, J type
133 A,
(15>2ST
(4)2ST
16b vce
l4p 2st
引珊端扑列
3 21 70 19
NY(5)
-2Y*t91
2Y12）
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SJ20159--92
3.2.2 Function table
3. 2.2. 1 The function table of JT54LS155 is as follows: Dual 2-wire to 4-wire decoding
3-wire to 8-wire decoding
3.2.2.2 The function table of JT54LS156 is as follows: Input
SJ 20159—-92
Dual 2-wire to 4-wire decoding
3-wire to 8-wire decoding
Note: H is the high half, L is the low half, X is any state, OFF is the cut-off state: A is 1ST and 2S connected, T is 1ST and 2ST reversely connected.
3.2.3 Electrical schematic diagram
SJ 20159—92
The manufacturer shall submit the electrical schematic diagram to the appraisal agency before appraisal. The electrical schematic diagram shall be archived by the appraisal agency for future reference. 3.2.4 Package form
The package form shall comply with the provisions of Article 1.3.1.3 of this specification. 3.3 Lead material and coating
The lead material and coating shall comply with the provisions of Article 3.5.6 of GJB597, 3.4 Electrical characteristics
The electrical characteristics shall comply with the requirements of Table 1 of this specification. Table 1-1 Characteristics of JT54LS155 Condition 1) Output high level voltage Output low level voltage Input clamp voltage Input at maximum input voltage Input current Input low level current Output short circuit current Supply current Transmission delay time (unless otherwise specified, -55 ≤ ≤ 125 °C) Vm = 4. 5 V, Ku = 2. 0 Y, lan = -400 μA Tc = 4. 5 V, Vl = 2. 0 V, Vt = 0. 7 V, Ia, = 4 184Vom -4. 5 V, I1k--18 mA, 7, = 25 CF = 5.5 V, V = 7. 0 V
Ve-5.5 V, K-2.7 V
Va-5. 5 V, V-0. 4 V
Vec=5. 5 V
R=2 k,
C=15 pF
Note: 1) The complete test conditions are listed in Table 3 2) Only one output terminal can be short-circuited at a time.
AA,257.1S..2ST.
→Any—(Level 2)
A,A→Any—(Level 3)
1ST-Any—(Level 3)
Specification value
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Output low-half voltage
Output high-state current
Input voltage
Input current at maximum input voltage
Input high-level current
Input low-level current
Power supply current
Propagation delay time
SJ 20159--92
Table 1-2 Electrical characteristics of JT54LS156
(Unless otherwise specified, 55≤≤125℃)Ne=4. 5 V, K=2. 0 V, V=0. 7 V, I,=4 m4c=4. 5 V, V=2. 0 V, VI=0. 7 VV,=5. 5 Vc=4. 5 V, Ik= 18 mA, T=25 CNe=5. 5 V, V-7.0 V
Ve=5. 5 V, V=2. 7 V
V=5. 5 V, -0. 4 V
Ke=5. 0 Y
R-2kn,
G=15 pF
Note: 1) The complete test conditions are listed in Table 3. 3.5 Electrical test requirements
A, A,2STg 1ST, 2s7
→Ren·y(Level 2)
Aa, A→Ren—(Level 3)
1ST+Ren—(Level 3)
Specification value
The electrical test requirements for devices at each level shall be the relevant sub-groups specified in Table 2 of this specification, and the electrical tests for each group shall be in accordance with the provisions of Table 3 of this specification.
Intermediate (before aging) electrical testwwW.bzxz.Net
Intermediate (after aging) electrical test
Final electrical test
Group A test requirements
Group C endpoint electrical test (Method 5005)
Group C inspection added group
D endpoint core test (Method 5005)
SJ20159—92
Table 2 Electrical test requirements
Group (see Table 3)
Grade B devices
A2. A3, 47, A9
AI,A2A3A7,A9,A10,A11
A1, A2, A3
Not required
A1，A2，A3
Note: 1) This group requires PDA calculation (see 4.2). Table 3-1, IT54LS155 Group A electrical test grouping
Reference standard
GB3439
(If other regulations are met, T=25 ℃)
Class B devices
A2, A3, A7, A9
A1, A2,A3, A7. A9
Al, A2, A3
A10,11
AI+42,A3
Specification value
Wt=4. 5 V, S7, Vm=2. 0 V, measured output Lg=-400 μA 2. 5Ve=4.5V, AgA, T, T (ST) According to the function table, the corresponding voltages are preset, Vu=2.0V, Vm=0.7V, and the measured output Tu=4 ma
Vc=4. 5 V, the measured input is Ir=-18 m4Vc5.5V, the measured encoder input is V-7.0VKc=5.5 V, the measured decoder input is F=2.7 Vcc-5.5V, the measured decoder input is V,-0.4VVee5.5v
1 group decoder 1S7, terminal -5.5 V, the measured output is connected to 2 groups of decoders 2.57 terminal 5.5V, the measured output is grounded Vr-5.5Y,An, A, 157 terminal V=1.5V, S72S7, terminal grounded
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→Ren·y(Level 2)
Aa, A→Ren—(Level 3)
1ST+Ren—(Level 3)
Specification value
The electrical test requirements for devices at each level shall be the relevant sub-groups specified in Table 2 of this specification, and the electrical tests for each group shall be in accordance with the provisions of Table 3 of this specification.
Intermediate (before aging) electrical test
Intermediate (after aging) electrical test
Final electrical test
Group A test requirements
Group C endpoint electrical test (Method 5005)
Group C inspection added group
D endpoint core test (Method 5005)
SJ20159—92
Table 2 Electrical test requirements
Group (see Table 3)
Grade B devices
A2. A3, 47, A9
AI,A2A3A7,A9,A10,A11
A1, A2, A3
Not required
A1，A2，A3
Note: 1) This group requires PDA calculation (see 4.2). Table 3-1, IT54LS155 Group A electrical test grouping
Reference standard
GB3439
(If other regulations are met, T=25 ℃)
Class B devices
A2, A3, A7, A9
A1, A2,A3, A7. A9
Al, A2, A3
A10,11
AI+42,A3
Specification value
Wt=4. 5 V, S7, Vm=2. 0 V, measured output Lg=-400 μA 2. 5Ve=4.5V, AgA, T, T (ST) According to the function table, the corresponding voltages are preset, Vu=2.0V, Vm=0.7V, and the measured output Tu=4 ma
Vc=4. 5 V, the measured input is Ir=-18 m4Vc5.5V, the measured encoder input is V-7.0VKc=5.5 V, the measured decoder input is F=2.7 Vcc-5.5V, the measured decoder input is V,-0.4VVee5.5v
1 group decoder 1S7, terminal -5.5 V, the measured output is connected to 2 groups of decoders 2.57 terminal 5.5V, the measured output is grounded Vr-5.5Y,An, A, 157 terminal V=1.5V, S72S7, terminal grounded
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→Ren·y(Level 2)
Aa, A→Ren—(Level 3)
1ST+Ren—(Level 3)
Specification value
The electrical test requirements for devices at each level shall be the relevant sub-groups specified in Table 2 of this specification, and the electrical tests for each group shall be in accordance with the provisions of Table 3 of this specification.
Intermediate (before aging) electrical test
Intermediate (after aging) electrical test
Final electrical test
Group A test requirements
Group C endpoint electrical test (Method 5005)
Group C inspection added group
D endpoint core test (Method 5005)
SJ20159—92
Table 2 Electrical test requirements
Group (see Table 3)
Grade B devices
A2. A3, 47, A9
AI,A2A3A7,A9,A10,A11
A1, A2, A3
Not required
A1，A2，A3
Note: 1) This group requires PDA calculation (see 4.2). Table 3-1, IT54LS155 Group A electrical test grouping
Reference standard
GB3439
(If other regulations are met, T=25 ℃)
Class B devices
A2, A3, A7, A9
A1, A2,A3, A7. A9
Al, A2, A3
A10,11
AI+42,A3
Specification value
Wt=4. 5 V, S7, Vm=2. 0 V, measured output Lg=-400 μA 2. 5Ve=4.5V, AgA, T, T (ST) According to the function table, the corresponding voltages are preset, Vu=2.0V, Vm=0.7V, and the measured output Tu=4 ma
Vc=4. 5 V, the measured input is Ir=-18 m4Vc5.5V, the measured encoder input is V-7.0VKc=5.5 V, the measured decoder input is F=2.7 Vcc-5.5V, the measured decoder input is V,-0.4VVee5.5v
1 group decoder 1S7, terminal -5.5 V, the measured output is connected to 2 groups of decoders 2.57 terminal 5.5V, the measured output is grounded Vr-5.5Y,An, A, 157 terminal V=1.5V, S72S7, terminal grounded
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