Some standard content:
UDC621.397.2
National Standard of the People's Republic of China
GB/T15526—1995
PCM encoder/decoder system for audio recording
PCM encoder/decoder system for audio recordingPublished on April 6, 1995
State Administration of Technical Supervision
Implementation on November 1, 1995
National Standard of the People's Republic of China
PCM encoder/decoder system for audio recording
PCM encoder/decoder system for audio recordingGB/T15526—1995
This standard is not equivalent to the international standard IEC841 "PCM encoding and decoding system for audio recording" (1988 edition). Subject content and scope of application
This standard specifies the format of the PCM encoding and decoding system signal and other relevant conditions. This standard applies to the PCM codec used for recording and playing audio signals in video recording systems. 2 System Description
The encoder in the PCM codec system converts two audio signals into one PCM signal with redundant information. The redundant information includes error correction codes added to correct random errors generated during recording or playback. The format of PCM signal encoding is consistent with the 625-line/50-field television standard recorded by the video recording system.
The decoder in the PCM codec system converts and processes the PCM signal into two audio signals. 3 Recording Signal Format
3.1 Overview
The format of the recording signal is consistent with the 625-line/50-field television standard signal. 3.2 Transmission Rate
The transmission rate is 2.625 Mbit/s.
3.3 Synchronization Signal Configuration
3.3.1 Line Synchronization Signal
The line synchronization signal included in the line period is shown in Figure 1. Line report
Figure 1 Line period
3.3.2 Field synchronization signal
The composition of the field synchronization signal with equalized pulse is shown in Figure 2. Approved by the State Administration of Technical Supervision on April 6, 1995 and implemented on November 1, 1995
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3.4 Row Configuration
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GB/T15526—1995
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3.4.1 Data Synchronization Signal
The data synchronization signal consists of: “1010” 3.4.2 Data Block
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Figure 2 Field Synchronization Signal
The data block consists of 128 bit, and is non-return-to-zero (NRZ) modulation. 3.4.3 White level reference signal
The white level reference signal is 4 bits wide and the peak value is the white level. 3.4.4 Configuration in the line cycle
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-A line cycle consists of 168 bits. The allocation of data synchronization signals, data blocks and white level reference signals in the line cycle is shown in Figure 3.
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Figure 3 Configuration in the line cycle
GB/T15526—1995
When the terminal is connected to a 75Ω load, measure the level of each voltage. The error of the level is ±1 0% See Appendix A (Supplement). 3.5 Field Configuration
3.5.1 Audio Data Block Row
The audio data block row occupies the line period containing the audio data block as specified in clause 5.1. 3.5.2 Control Data Block Row
The control data block row occupies the line period containing the control data block as specified in clause 5.2. 3.5.3 Field Configuration
The field synchronization signal with equalization pulse is at the front of each field. As shown in Figure 4, for For the first and third fields, the control data block is located at line 6, and for the second and fourth fields it is located at line 6.5. 294 audio data block lines follow the control data block line. The remaining lines in the field are blank. , Field decision signal
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4.1 audio signal
4.1.1 number of audio channels|| tt||Guangjiaopeidian
1 Audio data block
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Configuration in Figure 4 Field
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The number of recorded audio channels is two, represented by A and B. As a stereo application, channels A and B correspond to the left and right channels respectively. 4.1.2 Emphasis
Pre-emphasize the audio signal. The values of the time constants ti and t2 are: ti=50μs, t2=15μs. The characteristics of pre-emphasis and de-emphasis are shown in Figure 5. 3
4.2 Source Coding
4.2.1 Sampling
GB/T15526—1995
5 Pre-emphasis and de-emphasis
The sampling frequency is 44.100kHz±0.01%. It is recommended to sample both channels simultaneously. It is also acceptable to sample both channels alternately in the order of channel A followed by channel B. 4.2.2 Quantization
The sampled signal is recorded using 14-bit or 16-bit linear coding. Note: The main text of this standard describes 14-bit coding. Appendix B (Supplementary) describes 16-bit coding. 4.2.3 Coding
Use binary complement. A positive binary code represents a positive audio signal voltage. 5 Data Block
5.1 Configuration of Audio Data Block
5.1.1 Overview
An audio data block consists of six sampled signal words, two error correction words, and one error check word. 5.1.2 Sampled Signal Words
The sampled signal word consists of 14 bits with the most significant bit (MSB) being bit 1 and the least significant bit (LSB) being bit 14, as shown in Figure 6. For the nth sampled word of channels A and B, they are denoted as A. and BR-ISI, respectively
5.1.3 Error Correction Words
Each error correction word represented by P. and Q. in Figure 6 consists of 14 bits generated by the following equation, see Appendix B (Supplement). P=A+B+A+1+B+1+A+2+B+2
GB/T15526—1995
Q=TA+T5B+T*A+1+T3B+1+T2A+2+TB+2In the formula: n——0 or multiple of 3;
T——generate the matrix and complete the calculation modulo 2. The generating matrix T is defined by the following formula:
00000000000001
10000000000000
0100000000000
00100000000000
00010000000000
00001000000000
The sampled signal words A and B are represented by the following matrix: 0100000000
00000010000000
00000001000000
00000000100000
000 00000010000
00000000001000
00000000000100
00000000000010
bit 14
5.1.4 Interleaving
The eight-word sequence consists of six sampled signal words and two error correction words in the following form [A, B, A++1, Bu+1, Au+2, Bu+2, PQ.] The interleaving of the distance D is completed on the above sequence, and the eight-word sequence after interleaving is as follows: ·.(2)
·(3)
.............(4)
[A, B#-3D, Am+1-6D, Bm+1-9D, A+2-12D, B#+2-15D, Pn-18D, Q#-21D] The distance D is equal to 16, which is equivalent to 48 words. 5.1.5 Error check word
The error check word represented by CRC consists of 16 bits generated by the following method. Each of the first 16 bits in the interleaved eight-word sequence (112 bits) is modulo 2 added with "1". After addition, each bit of the sequence corresponds to the coefficients of the polynomial from X12 to X16. 5
GB/T15526—1995
This polynomial is divided modulo 2 by the following generating polynomial: G(X) =X16+X12+X5+1
The error check word is given by the coefficients of the X15 to X° terms in the remainder obtained by the division. CRC is expressed as follows:
CRC = (1 +b1)X127 + (1 +b2)X126 +*** + (1 +b16)X112 + b17Xl11 + b18X110++b112X1modG(X) Where: bi is the most significant bit of A,
b112 is the least significant bit of Q-21D.
5.1.6 Configuration in audio data block
(5)
···( 6)
In a complete sequence, the positions of the sample signal word, error correction word and error check word in the data block are shown in Figure 7. E.
5.2 Configuration of control data block
5.2.1 Overview
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Figure 7 Configuration in audio data block
The control data block consists of prompt words, content identification words, address words, control words and error check words. 5.2.2 Prompt word
The prompt word consists of 56 bits, as shown below: "110011001100..-1100\
5.2.3 Content identification word
The content identification word consists of 14 bits, which are all 0 in this standard. 5.2.4 Address word
The address word consists of 28 bits and is divided into three independent codes: index code, time code and field code. Each code is represented by a binary number. 5.2.4.1 Index code
The index code is 6 bits in the range of \000000(00)~111111(3F)". Control the update of the index code during recording. 5.2.4.2 Time code
The time code consists of 16 bits, which are divided into "hour", "minute" and "second". "Hour" consists of 4 bits, "minute" consists of 6 bits, and the 60th number advances to "hour". "Second" consists of 6 bits, and the 60th number advances to "minute". When recording the values of "hour", "minute" and "second", reset to zero or adjust to the predetermined value.
5.2.4.3 Field code
The field code consists of 6 bits, and advances every 50 pulses (625 lines/50 fields). The field code value is calculated in each field specified in Article 3.5. Odd and even numbers are arranged in odd and even fields respectively. The field code is reset under control during recording. 5.2.4.4 Configuration of codes in address words
The index code, time code and field code are configured between address words, as shown in Figure 8. 6
GB/T15526—1995
Figure 8 Configuration of codes in address words
The most significant bit of each code is first, and the least significant bit is later. 5.2.5 Control word
The control word consists of 14 bits, see Table 1.
Table 1 Status of control word
5.2.6 Error check word
Identification code in accordance with this standard
No provisions
Copy prohibition code
P—Error correction identification code
Q—Error correction identification code
Pre-emphasis identification code
According to this standard
Not prohibited||Code status
The error check word represented by CRC consists of 16 bits and is generated from a 112-bit sequence consisting of a prompt word, a content identification word, an address word and a control word in accordance with the provisions of Article 5.1.5. 5.2.7 Composition of control data block
Each word is arranged in the following order:
Prompt word
Content identification word
Address word
Control word
Error check word (CRC)
As shown in Figure 9.
Figure 9 Composition of control data block
GB/T15526—1995
Appendix A
Noise level in the trailing edge
(Supplement)
A1 The noise level included in the interval between the trailing edge of the horizontal synchronization signal and the leading edge of the data synchronization signal is 30mV or less when the output is connected to a 75Q load and the bandwidth is 4.4MHz±500kHz. Appendix B
Error Correction Word
(Supplement)
B1 As in the general rule, the two error correction words P and Q are applied. B2 In the 16-bit configuration, only the P error correction word is used. Each of the last two bits of the six sampled signal words and an error correction word consisting of 16 bits are located at the position of the error correction word "Q-21D" in the audio data block, as shown in Figure B1. An - n+ -. Br . wAn
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Composition of Audio Data Block
In Figure B1, A, B, etc., represent the last two bits of the 16 bits (in the order of bits 15 and 16). Appendix C
Recording System
(Supplement)
C1 The codec system that appears in the form of an add-on requires that the connected recording system meet the following conditions. Signal-to-noise ratio: about 40dB;
Jitter: about 0.3%,
Bend: about ±15μs;
Output level: peak-to-peak 1 ±0.2V,
Switching point: some can be included in the data; Frequency characteristics: frequency characteristics depend on the equipment; Tracking: manual adjustment may be required;
Tape condition: under regular use, the presence of scratches and wrinkles should be considered. 8
GB/T15526—1995
Because the output signal is also affected by other unstable factors through the video system. Therefore, good stability should be established as much as possible during design and manufacturing.
For the convenience of users, it is hoped that the codec system will automatically track the changing factors as much as possible. Tracking adjustment should be performed on the video system, so it is necessary to provide some methods, such as setting indicators, which can be used to determine the best point. Recently, more video systems have added long-playing modes in addition to the standard mode. When recording in PCM, the standard mode should be used from the viewpoint of stability and reliability.
When combining a video recording system and a PCM codec system in accordance with this standard, it is also important to consider the design of the video recording system in order to maintain the performance of PCM recording.
Additional remarks:
This standard was proposed by the Ministry of Electronics Industry of the People's Republic of China. This standard is under the jurisdiction of the Standardization Research Institute of the Ministry of Electronics Industry. This standard was drafted by the Third Research Institute of the Ministry of Electronics Industry. The main drafters of this standard are Xiao Hexiang and Tang Tao.1 Index code
The index code is 6 bits in the range of \000000(00)~111111(3F)". The update of the index code is controlled during recording. 5.2.4.2 Time code
The time code consists of 16 bits, divided into "hour", "minute" and "second". "Hour" consists of 4 bits, "minute" consists of 6 bits, and the 60th number advances to "hour" "second" consists of 6 bits, and the 60th number advances to "minute" . When recording the values of "hour", "minute" and "second", reset to zero or adjust to the predetermined value.
5.2.4.3 Field code
The field code consists of 6 bits, which are carried every 50 pulses (625 lines/50 fields). The field code value is calculated in each field specified in Article 3.5. Odd and even numbers are arranged in odd and even fields respectively. The field code is reset under control during recording. 5.2.4.4 Configuration of codes in address words
Index code, time code The and field codes are configured between the address words, as shown in Figure 8. 6
GB/T15526—1995
Figure 8 Configuration of codes in address words
The most significant bit of each code is first, and the least significant bit is last. 5.2.5 Control word
The control word consists of 14 bits, see Table 1.
Table 1 Status of control word
5.2.6 Error check word
Identification that complies with this standard Code
No regulation
Copy prohibition code
P—Error correction identification code
Q—Error correction identification code
Pre-emphasis identification code
According to this standard
Not prohibited
Code status
The error check word represented by CRC is composed of 16 bits, which is composed of a prompt word, content identification word, address word and control word in accordance with the provisions of Article 5.1.5. bit sequence. 5.2.7 Composition of control data block
Each word is arranged in the following order:
Prompt word
Content identification word
Address word
Control word
Error check word (CRC)
As shown in Figure 9.
Figure 9 Composition of control data block
GB/T15526—1995
Appendix A
Noise level in the trailing edge
(Supplement)
A1 contains the noise level in the trailing edge of the line synchronization signal and the data synchronization The noise level in the interval between the leading edges of the signal is 30 mV or less when the output is connected to a 75Ω load and the bandwidth is 4.4 MHz ± 500 kHz. Appendix B
Error Correction Word
(Supplement)
B1 As in the general rule, two error correction words, P and Q, are used. B2 In the 16-bit configuration, only the P error correction word is used. Each of the last two bits of the six sampled signal words and an error correction word composed of 16 bits are located at the position of the error correction word "Q-21D" in the audio data block, as shown in Figure B1. An - n+ -. Br . wAn
Ckr- i
Composition of Audio Data Block
In Figure B1, A, B, etc., represent the last two bits of the 16 bits (in the order of bits 15 and 16). Appendix C
Recording System
(Supplement)
C1 The codec system that appears in the form of an add-on requires the connected recording system to meet the following conditions. Signal-to-noise ratio: about 40dB;
Jitter: about 0.3%,
Curve: about ±15μs;
Output level: peak-to-peak 1±0.2V,
Switching point: some can be included in the data; Frequency characteristics: frequency characteristics depend on the equipment; Tracking: manual adjustment may be required;
Tape condition: under frequent use, the presence of scratches and wrinkles should be considered. 8
GB/T15526—1995
Since the output signal is also affected by other unstable factors through the recording system. Therefore, good stability should be established as much as possible during design and manufacturing.
For the convenience of users, it is hoped that the codec system will automatically track the changing factors as much as possible. Tracking adjustments are to be made on the video recording system, so it is necessary to provide some means, such as setting indicators, by which the optimum point can be determined. Recently, more video recording systems have been supplemented with a long-play mode in addition to the standard mode. In PCM recording, the standard mode should be used from the viewpoint of stability and reliability.
When combining a video recording system and a PCM codec system in accordance with this standard, it is also important to consider the design of the video recording system in order to maintain the performance of PCM recording.
Additional remarks:
This standard was proposed by the Ministry of Electronics Industry of the People's Republic of China. This standard is under the jurisdiction of the Standardization Research Institute of the Ministry of Electronics Industry. This standard was drafted by the Third Research Institute of the Ministry of Electronics Industry. The main drafters of this standard are Xiao Hexiang and Tang Tao.1 Index code
The index code is 6 bits in the range of \000000(00)~111111(3F)". The update of the index code is controlled during recording. 5.2.4.2 Time code
The time code consists of 16 bits, divided into "hour", "minute" and "second". "Hour" consists of 4 bits, "minute" consists of 6 bits, and the 60th number advances to "hour" "second" consists of 6 bits, and the 60th number advances to "minute" . When recording the values of "hour", "minute" and "second", reset to zero or adjust to the predetermined value.
5.2.4.3 Field code
The field code consists of 6 bits, which are carried every 50 pulses (625 lines/50 fields). The field code value is calculated in each field specified in Article 3.5. Odd and even numbers are arranged in odd and even fields respectively. The field code is reset under control during recording. 5.2.4.4 Configuration of codes in address words
Index code, time code The and field codes are configured between the address words, as shown in Figure 8. 6
GB/T15526—1995
Figure 8 Configuration of codes in address words
The most significant bit of each code is first, and the least significant bit is last. 5.2.5 Control word
The control word consists of 14 bits, see Table 1.
Table 1 Status of control word
5.2.6 Error check word
Identification that complies with this standard Code
No regulation
Copy prohibition code
P—Error correction identification code
Q—Error correction identification code
Pre-emphasis identification code
According to this standard
Not prohibited
Code status
The error check word represented by CRC is composed of 16 bits, which is composed of a prompt word, content identification word, address word and control word in accordance with the provisions of Article 5.1.5. bit sequence. 5.2.7 Composition of control data block
Each word is arranged in the following order:
Prompt word
Content identification word
Address word
Control word
Error check word (CRC)
As shown in Figure 9.
Figure 9 Composition of control data block
GB/T15526—1995
Appendix A
Noise level in the trailing edge
(Supplement)
A1 contains the noise level in the trailing edge of the line synchronization signal and the data synchronization The noise level in the interval between the leading edges of the signal is 30 mV or less when the output is connected to a 75Ω load and the bandwidth is 4.4 MHz ± 500 kHz. Appendix B
Error Correction Word
(Supplement)
B1 As in the general rule, two error correction words, P and Q, are used. B2 In the 16-bit configuration, only the P error correction word is used. Each of the last two bits of the six sampled signal words and an error correction word composed of 16 bits are located at the position of the error correction word "Q-21D" in the audio data block, as shown in Figure B1. An - n+ -. Br . wAn
Ckr- i
Composition of Audio Data Block
In Figure B1, A, B, etc., represent the last two bits of the 16 bits (in the order of bits 15 and 16). Appendix C
Recording System
(Supplement)
C1 The codec system that appears in the form of an add-on requires the connected recording system to meet the following conditions. Signal-to-noise ratio: about 40dB;
Jitter: about 0.3%,
Curve: about ±15μs;
Output level: peak-to-peak 1±0.2V,
Switching point: some can be included in the data; Frequency characteristics: frequency characteristics depend on the equipment; Tracking: manual adjustment may be required;
Tape condition: under frequent use, the presence of scratches and wrinkles should be considered. 8
GB/T15526—1995
Since the output signal is also affected by other unstable factors through the recording system. Therefore, good stability should be established as much as possible during design and manufacturing.
For the convenience of users, it is hoped that the codec system will automatically track the changing factors as much as possible. Tracking adjustments are to be made on the video recording system, so it is necessary to provide some means, such as setting indicators, by which the optimum point can be determined. Recently, more video recording systems have been supplemented with a long-play mode in addition to the standard mode. In PCM recording, the standard mode should be used from the viewpoint of stability and reliability.
When combining a video recording system and a PCM codec system in accordance with this standard, it is also important to consider the design of the video recording system in order to maintain the performance of PCM recording.
Additional remarks:
This standard was proposed by the Ministry of Electronics Industry of the People's Republic of China. This standard is under the jurisdiction of the Standardization Research Institute of the Ministry of Electronics Industry. This standard was drafted by the Third Research Institute of the Ministry of Electronics Industry. The main drafters of this standard are Xiao Hexiang and Tang Tao.2V,
Switching point: some may be included in the data; frequency characteristics: frequency characteristics depend on the equipment: tracking: manual adjustment may be required;
Tape condition: under regular use, the presence of scratches and wrinkles should be considered. 8
GB/T15526—1995
Since the output signal is also affected by other unstable factors through the video system. Therefore, good stability should be established as much as possible during design and manufacturing.
For the convenience of users, it is hoped that the codec system will automatically track the changing factors as much as possible. Tracking adjustment should be performed on the video system, so it is necessary to provide some methods, such as setting indicators, by which the optimal point can be determined. Recently, more video systems have added long-playing modes in addition to the standard mode. When recording PCM, the standard mode should be used from the perspective of stability and reliability.
When combining a video system and a PCM codec system in accordance with this standard, it is also important to consider the design of the video system in order to maintain the performance of PCM recording.
Additional Notes:
This standard was proposed by the Ministry of Electronics Industry of the People's Republic of China. This standard is under the jurisdiction of the Standardization Research Institute of the Ministry of Electronics Industry. This standard was drafted by the Third Research Institute of the Ministry of Electronics Industry. The main drafters of this standard are Xiao Hexiang and Tang Tao.2V,
Switching point: some may be included in the data; frequency characteristics: frequency characteristics depend on the equipment: tracking: manual adjustment may be required;
Tape condition: under regular use, the presence of scratches and wrinkles should be considered. 8
GB/T15526—1995
Since the output signal is also affected by other unstable factors through the video system. Therefore, good stability should be established as much as possible during design and manufacturing.
For the convenience of users, it is hoped that the codec system will automatically track the changing factors as much as possible. Tracking adjustment should be performed on the video system, so it is necessary to provide some methods, such as setting indicators, by which the optimal point can be determined. Recently, more video systems have added long-playing modes in addition to the standard mode. When recording PCM, the standard mode should be used from the perspective of stability and reliability. bZxz.net
When combining a video system and a PCM codec system in accordance with this standard, it is also important to consider the design of the video system in order to maintain the performance of PCM recording.
Additional Notes:
This standard was proposed by the Ministry of Electronics Industry of the People's Republic of China. This standard is under the jurisdiction of the Standardization Research Institute of the Ministry of Electronics Industry. This standard was drafted by the Third Research Institute of the Ministry of Electronics Industry. The main drafters of this standard are Xiao Hexiang and Tang Tao.
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