GB/T 11594-1989 Definition table of interchange circuits between data terminal equipment (DTE) and data circuit-terminating equipment (DCE) on public data networks
Some standard content:
National Standard of the People's Republic of China
GB/T11594—1989
CCITT-X.24—1984
List of definitions for interchange circuits between date terminal equipment (DTE) and data circuit-terminating equipment (DCE) on public data networks
Published on August 21, 1989
State Administration of Technical Supervision
Implementation on March 1, 1990
National Standard of the People's Republic of China
List of definitions for interchange circuits between date terminal equipment (DTE) and data circuit-terminating equipment (DCE) on public data networks Equipment (DCE) on public data networks
This standard is equivalent to CCITT Recommendation X.24
GB/T11594—1989
CCITT-X.24—1984
This standard is a definition table of interchange circuits between data terminal equipment and data circuit terminating equipment on my country's public data network. This standard defines the functions of interchange circuits between data terminal equipment and data circuit terminating equipment required for transmitting binary numbers, call control signals and timing signals on data networks. These circuits are applicable to a series of services provided by public data networks, such as circuit switching services, user telegraph services, packet switching services, message registration and retransmission services, and fax telegraph services. This standard translation is based on the English version of CCITT Recommendation X.24 (1984). In the text, the word "recommendation" should be understood as standard provisions, and the word "international" should be understood as international and domestic. Approved by the State Administration of Technical Supervision on August 21, 1989 and implemented on March 1, 1990
Recommendation X.24
GB/T11594—1989
Interchange circuit definition table between data terminal equipment (DTE) and data circuit terminating equipment (DCE) on public data networks
(Geneva, 1976, revised in Geneva, 1980, revised in Mali, 1984)
To:
-Torremolinos)
a: The interface between DTE and DCE in public data networks requires, in addition to the definition of the electrical and functional characteristics of the interchange circuits, the definition of call control functions and the procedural characteristics of service facility selection in accordance with Recommendation X.2; b. The circuit functions defined in Recommendation V.24 are defined in accordance with the requirements of data transmission on ordinary telephone networks and are not applicable to DTE/DCE interfaces on public data networks;
To announce that:
It is necessary to prepare a Recommendation to include a definition table of interchange circuits on public data networks. 1 Scope
1.1 The content of this Recommendation covers the various functions of interchange circuits provided for the transmission of binary data, call control signals and timing signals at the DTE/DCE interface of data networks. The interchange circuits required for any type of actual equipment may be appropriately selected from the various interchange circuits defined in this Recommendation. For the user service categories defined in Recommendation X.1 and the user service facilities defined in Recommendation X.2, the actual interchange circuits to be used in a particular DCE are given in the relevant Recommendations on interface specification characteristics, such as Recommendations X.20 or X.21. In order to be able to develop a standard DTE, it is not necessary for the DTE to use and terminate certain circuits, even though these circuits may already be implemented in the DCE. This aspect is described separately in the relevant Recommendations on interfaces. The interchange circuits used for binary data transmission are also used for the exchange of call control signals. Detailed descriptions of the electrical characteristics of the interchange circuits are given in the corresponding Recommendations on electrical characteristics of interchange circuits. The application of these characteristics to a particular DCE is described in the Recommendations on interface specification characteristics. 1.2 The range of interchange circuits described in this Recommendation is suitable for a range of services that can be provided by public data networks, such as circuit switching services (synchronous and start/stop), user telegraph services, packet switching services, message registration and retransmission services, and facsimile telegraph services. 2 Demarcation line
The interface between DTE and DCE is located at a connector, that is, the interchange point between the two types of equipment shown in Figure 1/X.24. 2.1 The connector does not have to be physically connected to the DCE but can be fixed near the DTE. The socket part of the connector belongs to the DCE. Fang Anxin
Figure 1/Schematic diagram of X.24 interface equipment
GB/T11594—1989
2.2 Usually DTE is equipped with a connecting cable. The length of the cable is limited by the electrical parameters specified in the recommendations on the electrical characteristics of the interchange circuit.
3 Definition of interchange circuit
For a list of data network interchange circuits, please refer to Table 1/X.24. Table 1/X.24 Data Network Interchange Circuits
Interchange Circuits
Interchange Circuit Name
Signal Ground or Common Return
DTE Common Return
DCE Common Return
Signal Symbol Timing
Byte Timing
Frame Start Identification
DTE Signal Symbol Timing
3.1 Circuit G — Signal Ground or Common Return From DCE
To DCE
From DCE
To DCE
From DCE
To DCE
This conductor provides the signal common reference potential for unbalanced two-current interchange circuits whose electrical characteristics conform to Recommendation V.28. In the case of interchange circuits defined in Recommendations V.10 and V.11, this conductor may be used to connect the zero volt reference points of the generator and receiver, if necessary, to reduce ambient signal interference.
In DCE, the conductors shall be concentrated at one point or at the protective earth wire by a metal sheet inside the equipment. The metal sheet may be connected or removed as required during installation to reduce noise intrusion into the electronic circuit or to meet the requirements of relevant regulations. Note: Where shielded connecting cables are used at the interface, the shield may be connected to circuit G or protective earth in accordance with national regulations. The protective earth may be further connected to an external ground wire in accordance with the relevant provisions of electrical safety regulations. Unbalanced interchange circuits with electrical characteristics as specified in Recommendation V.10 require two common return conductors, i.e. one conductor for each signal direction, and each conductor is grounded only on the generator side of the interface. Where applicable, these conductors will be marked with circuits G and G and defined as follows:
-DTE common return;
This conductor is connected to the common return of the DTE circuit and provides the reference potential for the X.26 type unbalanced interchange circuit receiver inside the DCE.
Circuit G, - DCE common loop
This conductor is connected to the common loop of the DCE circuit and provides a reference potential for the X.26 type unbalanced interchange circuit receiver inside the DTE.
3.2 Circuit T - Send
Direction: Towards DCE
When the binary signal generated by the DTE is intended to be transmitted to one or more remote DTEs through the data circuit during the data transmission phase, it is transmitted to the DCE on this circuit. According to the relevant recommendations of the interface protocol characteristics, during the call establishment phase and other call control phases, the DTE can also send call control signals to the DCE through this circuit.
GB/T11594—1989
DCE will detect this circuit according to the electrical characteristics specification of the interface in order to find circuit faults. Each circuit fault will be interpreted by the DCE according to the recommendations of the interface protocol characteristics. 3.3 Circuit R - Receive
Direction: DCE
During the data transmission phase, the binary signal received by DCE from the remote DTE shall be transmitted to DTE on this circuit. According to the relevant recommendations of the interface protocol characteristics, during the call establishment phase and other call control phases, DCE may also send out the received call control signals through this circuit. DTE will test this circuit according to the electrical characteristics specification of the interface to find out the fault of the electrical circuit, and each circuit fault will be interpreted by DTE according to the recommendations of the interface protocol characteristics. 3.4 Circuit C - Control
Direction: To DCE
Signals on this circuit are used to control the DCE during certain signalling procedures. The representation of control signals requires that circuit T "send" be coded as recommended in the interface specification characteristics. During the data phase, this circuit shall remain in the "on" state. During the call control phase, the state of this circuit shall comply with the recommendations of the interface specification characteristics. NOTE: After appropriate selection of special user service facilities (not yet defined), it may be necessary to change the "on" state after entering the data phase, depending on the regulations for the use of these facilities. This issue is for further study. The DCE will test this circuit in accordance with the electrical characteristics of the interface to detect circuit fault conditions. Each circuit fault will be interpreted by the DCE in accordance with the recommendations of the interface specification characteristics. 3.5 Circuit I - Indication
Direction: Signals on this circuit are used by the DCE
to indicate the status of the call control process to the DTE. The representation of control signals requires that circuit R - "receive" be coded as recommended in the interface specification characteristics. The "on" state of this circuit indicates that the signal on circuit R contains information from the far-end DTE. The "off" state indicates a control signaling state. It is defined by the bit sequence on circuit R as specified in the interface specification characteristics. The DTE will test this circuit for electrical circuit fault conditions as specified in the interface specification characteristics. Each circuit fault will be interpreted by the DTE as recommended by the interface specification characteristics. NOTE: Where special user service facilities (not yet defined) are used, the "off" state may be required after the transition to the data transfer phase, depending on the regulations for the use of these facilities. This issue is for further study. 3.6 Circuit S - Signal Symbol Timing
Direction: The signals on this circuit provide the DTE with signal symbol timing information by the DCE
. The circuit has two states, "on" and "off", and the nominal duration of the two states is approximately equal. However, in the case of bursty isochronous operation, the "off" state may be extended, and its duration is allowed to be equal to an odd multiple of the nominal duration of the "on" state as specified in the interface specification characteristics. The DTE shall send a binary signal on circuit T—
—“transmit” and a status signal on circuit C—“control”, with the transition occurring when this circuit changes from the “off” state to the “on” state. The DCE shall send a binary signal on circuit R—“receive” and a status signal on circuit C—“control”, with the transition occurring when this circuit changes from the “off” state to the “on” state. In the case where the timing source is capable of generating signal symbol timing information, the DCE shall continuously transmit this timing information over the interface on this circuit. 3.7 Circuit B—Byte Timing (see Note ?) Direction: The signals on this circuit provided by the DCE
provide the DTE with octet timing information. This circuit shall be in the “off” state to indicate the last bit of an octet for the duration that circuit S—“signal symbol timing” is in the “on” state, and in the “on” state for the remainder of the octet period.
GB/T11594—1989
During the call control phase, the call control characters and steady-state states used for all information transmissions between DCE and DTE in all directions shall be adjusted based on the signal on circuit B. The normal time for DTE to start sending the first bit of a call control character on circuit T--"send" shall occur at the moment when circuit S transitions from the "disconnected" state to the "connected" state, that is, it shall be transferred as circuit B transitions from the "disconnected" state to the "connected" state. The state transition of circuit C--"control" can occur at any time when circuit S transitions from "off" to "on", but its sampling at DCE occurs at the transition moment of circuit B from "off" to "on". This is done to facilitate the judgment of the subsequent call control characters on circuit T.
The center point of the last bit of each call control character should be sent by DCE to circuit R--"receive" at the moment when circuit B transitions from "off" to "on". The state transition of circuit I--"indication" should occur at the moment when circuit S transitions from "off" to "on", that is, it transitions with the transition of circuit B from "off" to "on". In the case where the timing source can generate byte timing information, DCE should The information is continuously transmitted through the interface. Note: ① During the data transmission phase, DTEs that communicate with the help of 8-bit codes can use byte timing information to maintain character synchronization with each other. There is a prerequisite for providing this function, namely, character synchronization must be maintained after the call enters the data transmission phase, and the synchronization alignment obtained on one interface must be synchronized with the synchronization alignment on other interfaces. (This possibility only exists on certain connections). In addition, wherever this function is available, state changes on the circuit C defined above may cause corresponding changes in the relative alignment on the far-end interface circuit I.
② In some recommendations on interface protocol characteristics (such as X.21), it is not stipulated that DTE must use this circuit and terminate this circuit, even if The implementation of this circuit within the DCE is no exception.
3.8 Circuit F - Frame Start Identification
Direction: by DCE
When this circuit is connected to a multiplexed DTE/DCE interface, the signal on this circuit continuously provides a multiplexed frame start indication to the DTE.
This circuit should be in the "off" state during the nominal duration of one bit to indicate the last bit of the multiplexed frame, and should remain in the "on" state for the rest of the time. The transmission or reception of the first data bit on user communication 1 should be carried out at the moment when circuit F begins to transition from the "off" to the "on" state.
3.9 Circuit X - DTE send signal code element timing Direction: to DCE
At Where circuit S only provides signal code element timing for the receiving direction, the signal on this circuit provides signal code element timing information for the transmitting direction. The duration of the "on" and "off" states of this circuit is roughly equal. However, in the case of burst isochronous operation, the duration of the "off" state can be extended to an odd multiple of the nominal duration of the "on" state according to the provisions of the relevant interface specification characteristics. DTE should send a binary signal on circuit T-"transmit" and a status signal on circuit C-"control". The transition of the circuit state occurs at the moment when this circuit transitions from "off" to "on". Note: The use and termination of this circuit by DCE is a domestic issue. Additional notes:
This standard was proposed by the Ministry of Posts and Telecommunications of the People's Republic of China. This standard is technically coordinated by the Data Communication Technology Research Institute of the Ministry of Posts and Telecommunications. This standard was drafted by the Data Communication Technology Research Institute of the Ministry of Posts and Telecommunications. The main drafters of this standard are Zhong Jiaqiang, Chen Jinzhang, He Rendong, and Li Song. 56 Circuit S - Signal Symbol Timing
Direction: The signal on this circuit is provided by DCEwww.bzxz.net
to DTE with signal symbol timing information. The states of this circuit are "on" and "off", and the nominal duration of the two states is approximately equal. However, in the case of burst isochronous operation, the "off" state can be extended, and its duration is allowed to be equal to an odd multiple of the nominal duration of the "on" state according to the relevant specifications of the interface protocol characteristics. DTE should send a binary signal on circuit T-
-"send" and a status signal on circuit C--"control", and its transition occurs when this circuit changes from the "off" state to the "on" state. DCE sends a binary signal on circuit R--"receive" and a status signal on circuit C--"control", and its transition occurs when this circuit changes from the "off" state to the "on" state. In the case where the timing source can generate signal symbol timing information, DCE should continuously transmit this timing information on this circuit via the interface. 3.7 Circuit B - Byte Timing (see Note ?) Direction: The DCE
signals on this circuit provide the DTE with octet timing information. During the duration that circuit S--"signal symbol timing" is in the "on" state, this circuit is in the "off" state to indicate the last bit of the octet, and in the "on" state for the rest of the octet period.
GB/T11594-1989
During the call control phase, the call control characters and steady-state states used for all information transfers between DCE and DTE in each direction shall be adjusted based on the signals on circuit B. The normal time for the DTE to start sending the first bit of a call control character on circuit T--"send" shall occur at the moment when circuit S transitions from the "off" to the "on" state, i.e., as circuit B transitions from the "off" to the "on" state. The state transition of circuit C--"control" can occur at any time when circuit S transitions from "off" to "on", but its sampling at DCE occurs at the transition moment of circuit B from "off" to "on". This is done to facilitate the judgment of the subsequent call control characters on circuit T.
The center point of the last bit of each call control character should be sent by DCE to circuit R--"receive" at the moment when circuit B transitions from "off" to "on". The state transition of circuit I--"indication" should occur at the moment when circuit S transitions from "off" to "on", that is, it transitions with the transition of circuit B from "off" to "on". In the case where the timing source can generate byte timing information, DCE should The information is continuously transmitted through the interface. Note: ① During the data transmission phase, DTEs that communicate with the help of 8-bit codes can use byte timing information to maintain character synchronization with each other. There is a prerequisite for providing this function, namely, character synchronization must be maintained after the call enters the data transmission phase, and the synchronization alignment obtained on one interface must be synchronized with the synchronization alignment on other interfaces. (This possibility only exists on certain connections). In addition, wherever this function is available, state changes on the circuit C defined above may cause corresponding changes in the relative alignment on the far-end interface circuit I.
② In some recommendations on interface protocol characteristics (such as X.21), it is not stipulated that DTE must use this circuit and terminate this circuit, even if The implementation of this circuit within the DCE is no exception.
3.8 Circuit F - Frame Start Identification
Direction: by DCE
When this circuit is connected to a multiplexed DTE/DCE interface, the signal on this circuit continuously provides a multiplexed frame start indication to the DTE.
This circuit should be in the "off" state during the nominal duration of one bit to indicate the last bit of the multiplexed frame, and should remain in the "on" state for the rest of the time. The transmission or reception of the first data bit on user communication 1 should be carried out at the moment when circuit F begins to transition from the "off" to the "on" state.
3.9 Circuit X - DTE send signal code element timing Direction: to DCE
At Where circuit S only provides signal code element timing for the receiving direction, the signal on this circuit provides signal code element timing information for the transmitting direction. The duration of the "on" and "off" states of this circuit is roughly equal. However, in the case of burst isochronous operation, the duration of the "off" state can be extended to an odd multiple of the nominal duration of the "on" state according to the provisions of the relevant interface specification characteristics. DTE should send a binary signal on circuit T-"transmit" and a status signal on circuit C-"control". The transition of the circuit state occurs at the moment when this circuit transitions from "off" to "on". Note: The use and termination of this circuit by DCE is a domestic issue. Additional notes:
This standard was proposed by the Ministry of Posts and Telecommunications of the People's Republic of China. This standard is technically coordinated by the Data Communication Technology Research Institute of the Ministry of Posts and Telecommunications. This standard was drafted by the Data Communication Technology Research Institute of the Ministry of Posts and Telecommunications. The main drafters of this standard are Zhong Jiaqiang, Chen Jinzhang, He Rendong, and Li Song. 56 Circuit S - Signal Symbol Timing
Direction: The signal on this circuit is provided by DCE
to DTE with signal symbol timing information. The states of this circuit are "on" and "off", and the nominal duration of the two states is approximately equal. However, in the case of burst isochronous operation, the "off" state can be extended, and its duration is allowed to be equal to an odd multiple of the nominal duration of the "on" state according to the relevant specifications of the interface protocol characteristics. DTE should send a binary signal on circuit T-
-"send" and a status signal on circuit C--"control", and its transition occurs when this circuit changes from the "off" state to the "on" state. DCE sends a binary signal on circuit R--"receive" and a status signal on circuit C--"control", and its transition occurs when this circuit changes from the "off" state to the "on" state. In the case where the timing source can generate signal symbol timing information, DCE should continuously transmit this timing information on this circuit via the interface. 3.7 Circuit B - Byte Timing (see Note ?) Direction: The DCE
signals on this circuit provide the DTE with octet timing information. During the duration that circuit S--"signal symbol timing" is in the "on" state, this circuit is in the "off" state to indicate the last bit of the octet, and in the "on" state for the rest of the octet period.
GB/T11594-1989
During the call control phase, the call control characters and steady-state states used for all information transfers between DCE and DTE in each direction shall be adjusted based on the signals on circuit B. The normal time for the DTE to start sending the first bit of a call control character on circuit T--"send" shall occur at the moment when circuit S transitions from the "off" to the "on" state, i.e., as circuit B transitions from the "off" to the "on" state. The state transition of circuit C--"control" can occur at any time when circuit S transitions from "off" to "on", but its sampling at DCE occurs at the transition moment of circuit B from "off" to "on". This is done to facilitate the judgment of the subsequent call control characters on circuit T.
The center point of the last bit of each call control character should be sent by DCE to circuit R--"receive" at the moment when circuit B transitions from "off" to "on". The state transition of circuit I--"indication" should occur at the moment when circuit S transitions from "off" to "on", that is, it transitions with the transition of circuit B from "off" to "on". In the case where the timing source can generate byte timing information, DCE should The information is continuously transmitted through the interface. Note: ① During the data transmission phase, DTEs that communicate with the help of 8-bit codes can use byte timing information to maintain character synchronization with each other. There is a prerequisite for providing this function, namely, character synchronization must be maintained after the call enters the data transmission phase, and the synchronization alignment obtained on one interface must be synchronized with the synchronization alignment on other interfaces. (This possibility only exists on certain connections). In addition, wherever this function is available, state changes on the circuit C defined above may cause corresponding changes in the relative alignment on the far-end interface circuit I.
② In some recommendations on interface protocol characteristics (such as X.21), it is not stipulated that DTE must use this circuit and terminate this circuit, even if The implementation of this circuit within the DCE is no exception.
3.8 Circuit F - Frame Start Identification
Direction: by DCE
When this circuit is connected to a multiplexed DTE/DCE interface, the signal on this circuit continuously provides a multiplexed frame start indication to the DTE.
This circuit should be in the "off" state during the nominal duration of one bit to indicate the last bit of the multiplexed frame, and should remain in the "on" state for the rest of the time. The transmission or reception of the first data bit on user communication 1 should be carried out at the moment when circuit F begins to transition from the "off" to the "on" state.
3.9 Circuit X - DTE send signal code element timing Direction: to DCE
At Where circuit S only provides signal code element timing for the receiving direction, the signal on this circuit provides signal code element timing information for the transmitting direction. The duration of the "on" and "off" states of this circuit is roughly equal. However, in the case of burst isochronous operation, the duration of the "off" state can be extended to an odd multiple of the nominal duration of the "on" state according to the provisions of the relevant interface specification characteristics. DTE should send a binary signal on circuit T-"transmit" and a status signal on circuit C-"control". The transition of the circuit state occurs at the moment when this circuit transitions from "off" to "on". Note: The use and termination of this circuit by DCE is a domestic issue. Additional notes:
This standard was proposed by the Ministry of Posts and Telecommunications of the People's Republic of China. This standard is technically coordinated by the Data Communication Technology Research Institute of the Ministry of Posts and Telecommunications. This standard was drafted by the Data Communication Technology Research Institute of the Ministry of Posts and Telecommunications. The main drafters of this standard are Zhong Jiaqiang, Chen Jinzhang, He Rendong, and Li Song. 59 Circuit X - DTE sends signal symbol timing Direction: Towards DCE
Where circuit S provides signal symbol timing only for the receiving direction, the signal on this circuit provides signal symbol timing information for the sending direction. The duration of the "on" and "off" states of this circuit is roughly equal. However, in the case of burst isochronous operation, the duration of the "off" state can be extended to an odd multiple of the nominal duration of the "on" state according to the provisions of the relevant interface specification characteristics. DTE should send a binary signal on circuit T-"send" and a status signal on circuit C-"control". The transition of the circuit state occurs at the moment when this circuit transitions from "off" to "on". Note: The use and termination of this circuit by DCE is a domestic issue. Additional remarks:
This standard was proposed by the Ministry of Posts and Telecommunications of the People's Republic of China. This standard is technically coordinated by the Data Communication Technology Research Institute of the Ministry of Posts and Telecommunications. This standard was drafted by the Data Communication Technology Research Institute of the Ministry of Posts and Telecommunications. The main drafters of this standard are Zhong Jiaqiang, Chen Jinzhang, He Rendong, and Li Song. 59 Circuit X - DTE sends signal symbol timing Direction: Towards DCE
Where circuit S provides signal symbol timing only for the receiving direction, the signal on this circuit provides signal symbol timing information for the sending direction. The duration of the "on" and "off" states of this circuit is roughly equal. However, in the case of burst isochronous operation, the duration of the "off" state can be extended to an odd multiple of the nominal duration of the "on" state according to the provisions of the relevant interface specification characteristics. DTE should send a binary signal on circuit T-"send" and a status signal on circuit C-"control". The transition of the circuit state occurs at the moment when this circuit transitions from "off" to "on". Note: The use and termination of this circuit by DCE is a domestic issue. Additional remarks:
This standard was proposed by the Ministry of Posts and Telecommunications of the People's Republic of China. This standard is technically coordinated by the Data Communication Technology Research Institute of the Ministry of Posts and Telecommunications. This standard was drafted by the Data Communication Technology Research Institute of the Ministry of Posts and Telecommunications. The main drafters of this standard are Zhong Jiaqiang, Chen Jinzhang, He Rendong, and Li Song. 5
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